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Etude et caractérisation de l'influence des contraintes mécaniques sur les propriétés du transport électronique dans les architectures MOS avancées

Abstract : The Metal-Oxide-Semiconductor-Field-Effect-Transistors (MOSFET) down-scaling becomes insufficient to satisfy the International Technology Roadmap for Semiconductors (ITRS) performances specifications. A solution consist in improving electronic transport in the MOSFET channel : the use of the silicon piezoresistive effet is an interesting alternative to reach that point.
This study presents the state-of-the-art of innovating architectures making it possible to generate strain in the MOSFET channel, after having outlined the problematics that the current microelectronics must face. The strained-Si physics is also expounded. The emphasis is on the mechanical stress effect on carrier mobility which is a fundamental transport parameter in a MOSFET inversion layer. The two-dimensional piezoresistivity is then experimentally studied on various architectures. Electron conductivity mass decreasing under tensile uniaxial stress has been evidenced. After having presented the main electrical characterization techniques making it possible to extract the transport parameters of a MOS transistor, in particular the attractive mobility extraction by magnetoresistance, the physical origin of the mobility gain is extensively analysed on advanced architectures such as strained Silicon Directly On Insulator transistors (sSOI). The electron mobility and the stress-induced gain degradations with the gate length down-scaling are analysed. The mechanisms involved in the mobility limitation in very short channels are identified. Finally performances results of advanced substrate- or process-induced strained nanoscaled MOSFETs are shown in order to illustrate the benefit of strained silicon for the next CMOS generations. The cumulative effet of techniques able to strain the channel are also broached.
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https://tel.archives-ouvertes.fr/tel-00336989
Contributor : Florent Rochette <>
Submitted on : Thursday, December 11, 2008 - 5:02:54 PM
Last modification on : Saturday, November 21, 2020 - 3:32:52 AM
Long-term archiving on: : Friday, September 24, 2010 - 10:31:21 AM

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  • HAL Id : tel-00336989, version 4

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Florent Rochette. Etude et caractérisation de l'influence des contraintes mécaniques sur les propriétés du transport électronique dans les architectures MOS avancées. Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 2008. Français. ⟨tel-00336989v4⟩

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