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Integration of Single Photon Avalanche Diodes in Fully Depleted Silicon-on-Insulator Technology

Abstract : This work aims at the design, simulation, modelling and electrical characterization of Single Photon Avalanche Diodes (SPAD) in an advanced Fully Depleted Silicon on Insulator (FDSOI) technology. SPADs are PN junctions reversed bias above breakdown voltage, operating in the so-called Geiger mode. Such an implementation should provide an intrinsic monolithic integration of those devices, along with their mandatory associated electronics, thanks to the buried oxide layer present in that technology, optimizing fill factor. Due to its high sensitivity, SPAD are useful for several applications, such as Time of Flight (ToF) and Fluorescence Lifetime Imaging Microscopy (FLIM) measurements, as well as the detection of charged particles, in high-energy physics domain. The designed cells follow the main design rules imposed by the foundry and present variations in aspect as integration zone, geometry, guard distance and quenching circuit. TCAD simulations were performed in order to estimate some of the SPAD main Figures of Merit. Several avalanche and carrier generation models were studied for better adapting the simulated model to the actual fabricated devices. Electrical characterizations were realized for estimating important parameters such as breakdown voltage, Dark Count Rate (DCR) and electroluminescence response. Although the obtained results are still poor when compared to State-of-the-Art, its feasibility was demonstrated and can be used as a proof of concept, at the same time that improvements are proposed.
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Submitted on : Friday, July 17, 2020 - 6:41:09 PM
Last modification on : Saturday, July 18, 2020 - 3:38:02 AM


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  • HAL Id : tel-02902127, version 1


Tulio Chaves de Albuquerque. Integration of Single Photon Avalanche Diodes in Fully Depleted Silicon-on-Insulator Technology. Electronics. Université de Lyon, 2019. English. ⟨NNT : 2019LYSEI091⟩. ⟨tel-02902127⟩



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