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Modélisation, simulation et caractérisation électrique de cellule mémoire DRAM 1T : A2RAM

Abstract : With the growing of IOTs we need specific embedded memory which will be easily implemented in IOTs applications. This memory has to respect specific requirements; like: simple operation mode, high density, low power consumption, low cost. One memory which can fill all these requirements is the DRAM. The DRAM has been proposed for the first time in 1968 in its traditional architecture called 1T/1C-DRAM; but the main problem with this architecture is its low density of integration due to the limite on the scalability of the capacitor. That is why one has introduced new architectures of DRAM with no capacitor: we call them 1T-DRAM. Here the transistor is used to store and read the information. In the literature we can find many 1T-DRAM architectures, but the purpose of this thesis is to study the A2RAM, in order to see if it can be used as an embedded DRAM.
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Submitted on : Tuesday, April 7, 2020 - 1:16:07 PM
Last modification on : Friday, October 23, 2020 - 5:04:31 PM

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  • HAL Id : tel-02535001, version 1

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Francois Tcheme Wakam. Modélisation, simulation et caractérisation électrique de cellule mémoire DRAM 1T : A2RAM. Micro et nanotechnologies/Microélectronique. Université Grenoble Alpes, 2019. Français. ⟨NNT : 2019GREAT078⟩. ⟨tel-02535001⟩

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