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Des simulations Spice permettent à chaque fois d'optimiser la taille des transistors et d'évaluer les performances des circuits. Un effort particulier a été apporté à la conception et réalisation de la nouvelle structure du miroir de courant qui permet de limiter les effets de canal court tout en diminuant drastiquement la taille des transistors ,
, Le dernier chapitre est consacré à la réalisation d'un circuit de test en technologie FDSOI. Nous présentons la réalisation du dessin des masques
, L'ensemble des mesures réalisées est présenté dans ce chapitre et permet de valider le concept de logique complémentaire utilisant le croisement des grilles arrières des transistors UTBB-FDSOI. Les résultats, en termes de performances, sont très prometteurs pour la suite de ce travail
des conclusions générales et quelques perspectives terminent ce manuscrit. Les publications liées à ce travail de thèse sont également présentées ,
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