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FD-SOI technology opportunities for more energy efficient asynchronous circuits

Abstract : Keeping the fast evolving pace of embedded systems of portable devices require ameliorations of power management techniques, without compromising the circuit performance and robustness. In this context, this thesis studies novel energy management schemes, and how to implement them, by using two main design approaches: asynchronous logic and adaptive body biasing (ABB) techniques. Four main contributions have been done, thus enabling the design of more energy efficient asynchronous circuits. 1) We contributed with the design of a Quasi-delay Insensitive (QDI) asynchronous ALU architecture, used in a comparative analysis of asynchronous versus synchronous systems. This first study has demonstrated the energy efficiency and robustness of QDI circuits, especially if operating at low power supply (Vdd ). 2) We proposed a new body built-in cell for implementing ABB schemes by tuning the circuit threshold voltage (Vth) on-the-fly; and detecting short-duration and long-duration transient faults (TF) caused by environmental radiation. The proposed cell is a key building block to fully benefit from body biasing features of the FD-SOI technology while enhancing system’s reliability. 3) We assessed three different ABB strategies - based on automatic activity detection and multiple body-biasing domains (BBDs) - for QDI asynchronous circuits. Furthermore, a methodology for analyzing energy efficiency of ABB strategies in QDI asynchronous circuits is also proposed in this work. 4) We developed a standard cell-based IC design flow to apply ABB strategies with multiple BBDs by using the proposed body built-in cells. A testchip has been designed and fabricated to validate the developed design flow and the efficacy of the body built-in cell.
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Submitted on : Tuesday, September 24, 2019 - 11:53:06 AM
Last modification on : Friday, November 20, 2020 - 1:04:03 PM
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  • HAL Id : tel-02295530, version 1




Thiago Ferreira de Paiva Leite. FD-SOI technology opportunities for more energy efficient asynchronous circuits. Micro and nanotechnologies/Microelectronics. Université Grenoble Alpes, 2019. English. ⟨NNT : 2019GREAT002⟩. ⟨tel-02295530⟩



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