Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques

Abstract : This Ph.D. thesis is focused on the impact of the 14 and 28 nm FDSOI technologies HKMG stack processes on the electrical performance of MOS transistors. It concerns specifically the reliability aspect and the engineering of effective workfunction (WFeff ), through diffusion of lanthanum (La) and aluminum (Al) additives. This work combines electrical and physicochemical characterization techniques, and their development. The impact of La and Al incorporation, in the MOS gate stack, on reliability and device lifetime has been studied. La addition has a significant negative impact on device lifetime related to both NBTI and TDDB degradations. Addition of Al has a significant negative impact on lifetime related to PBTI, but on the contrary improves the lifetime for TDDB degradation. These impacts on device lifetime have been well correlated to the material changes inside the gate oxides. Moreover, diffusion of these additives into the HKMG stack with annealing temperature and time has been studied on different high-k materials. The diffused dose has been compared with the resulting shift in effective workfunction (WFeff), evidencing clear correlation. In addition, impact of TiN metal gate RF-PVD parameters on its crystal size and orientation, and device electrical properties has been studied. XRD technique has been used to obtain the crystal size and orientation information. These properties are significantly modulated by TiN process, with a low grain size and a unique crystal orientation obtained in some conditions. However, the WFeff modulations are rather correlated to the Ti/N ratio change, suggesting a change in the dipole at SiO2/high-k interface. Lastly, using specific test structures and a new test methodology, a robust and accurate XPS under bias technique has been developed to determine the relative band energy positions inside the HKMG stack of MOS devices. Using this technique, we demonstrated that WFeff shift induced by La and Al or by variations in gate thickness originates due to modifications of the dipole at SiO2/high-k interface.
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Pushpendra Kumar. Impact of 14/28nm FDSOI high-k metal gate stack processes on reliability and electrostatic control through combined electrical and physicochemical characterization techniques. Micro and nanotechnologies/Microelectronics. Université Grenoble Alpes, 2018. English. ⟨NNT : 2018GREAT114⟩. ⟨tel-02169583⟩

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