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Deep levels characterizations in SiC to optimize high voltage devices

Abstract : Due to the increasing appeal to the high voltage, high temperature and high fre-quency applications, Silicon Carbide (SiC) is continuing attracting world’s attention as one of the most competitive candidate for replacing silicon in power electric field. Meanwhile, it is important to characterize the defects in semiconductors and to in-vestigate their influences on power devices since they are directly linked to the car-rier lifetime. Moreover, reliability that is also affected by defects becomes an una-voidable issue now in power electrics. Defects, including point defects and extended defects, can introduce additional energy levels in the bandgap of SiC due to various metallic impurities such as Ti, Fe or intrinsic defects (vacancies, interstitial…) of the cristalline lattice itself. As one of the widely used defect characterization method, Deep Level Transient Spectroscopy (DLTS) is superior in determining the activation energy Ea , capture cross section sigma and defect concentration Nt as well as the defect profile in the depletion region thanks to its diverse testing modes and advanced numerical analysis. Determination of Schottky Barrier Height (SBH) has been confusing for long time. Apart from experimental measurement according to I-V or C-V characteristics, various models from Gaussian distribution of SBH to potential fluctuation model have been put forward. Now it was found that these models are connected with the help of flat-band barrier height Phi_BF . The Richardson plot based on Phi_BF along with the potential fluctuation model becomes a powerful tool for SBH characterization. SBHs with different metal contacts were characterized, and the diodes with multi-barrier are verified by different models. Electron traps in SiC were studied in Schottky and PiN diodes, while hole traps were investigated under strong injection conditions in PiN diodes. 9 electron traps and 4 hole traps have been found in our samples of 4H-SiC. A linear relationship between the extracted Ea and log(sigma) indicates the existence of the intrinsic temper-ature of each defects. However, no obvious difference has been found related to ei-ther barrier inhomogeneity or contact metal. Furthermore, the electron traps near in-terface and fixed positive charges in the oxide layer were investigated on SiC power MOSFETs by High Temperature Gate Bias (HTGB) and Total Ionizing Dose (TID) caused by irradiation. An HTGB-assist-TID model was established in order to ex-plain the synergetic effect.
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  • HAL Id : tel-02124529, version 1


Teng Zhang. Deep levels characterizations in SiC to optimize high voltage devices. Electronics. Université de Lyon, 2018. English. ⟨NNT : 2018LYSEI108⟩. ⟨tel-02124529⟩



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