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Methods for protecting intellectual property of IP cores designers

Abstract : Designing integrated circuits is now an extremely complex task. This is why designers adopt a modular approach, where each functional block is described independently. These functional blocks, called intellectual property (IP) cores, are sold by their designers to system integrators who use them in complex projects. This division led to the rise of cases of illegal copying of IP cores. In order to fight this threat against intellectual property of lP core designers, the objective of this PhD thesis was to develop a secure remote activation scheme for IP cores, allowing the designer to know exactly how many IP cores are currently used. To achieve this, the first two contributions of thesis thesis deal with the modification of combinational logic of an IP core to make it activable. The first method allows to controllably force the outputs to a fixed logic value. The second is an efficient technique to select the nodes to controllably alter, so that the IP core is temporarily unusable. The third contribution of this thesis is a lightweight method of error correction to use with PUF (Physical Undonable Functions) responses, which are an intrinsic identifier of instances of the lP core. Reusing an error-correction protocol used in quantum key ex.change, this method is much more lightweight than error-correcting
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  • HAL Id : tel-02109304, version 1

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Brice Colombier. Methods for protecting intellectual property of IP cores designers. Micro and nanotechnologies/Microelectronics. Université de Lyon, 2017. English. ⟨NNT : 2017LYSES038⟩. ⟨tel-02109304⟩

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