, // always @(state or enable or enable_tmp or mci or countci or j or reset) begin 65 always @( posedge CLK) begin 66 if (! reset) begin xil_printf

, InitializeAXIDma (

P. //-enable and . Controller,

, bytes (32 words) are transferred . 15 xil_printf (" setting up SampleGenerator unit

, EnableSampleGenerator ( PACKET_SIZE / 4 )

, // set the interrupt system and interrupt handling

, of S2MM_DMASR 20 xil_printf (" enabling the interrupt handling system

. Initializeinterruptsystem, , vol.7

/. Start, DMA Transfer 24 // write destination address to S2MM_DA register

, // write length to S2MM_LENGTH register

. Startdmatransfer, PACKET_SIZE, pp.0-000000

, // Data is in the DRAM ! do your processing here ! 29 u32 tt ,i; 30 for(i=0; i<( PACKET_SIZE /4); i++) { 31 tt= Xil_In32

, these is the first outputs i:%10 lu DDR :%10 lu = %10 lu\n\r

A. Vassilev and T. A. Hall, The importance of entropy to information security, Computer, vol.47, issue.2, pp.78-81, 2014.

S. Callegari, R. Rovatti, and G. Setti, Embeddable adc-based true random number generator for cryptographic applications exploiting nonlinear signal processing and chaos, IEEE Transactions on Signal Processing, vol.53, issue.2, pp.793-805, 2005.

X. Fang, B. Wetzel, J. M. Merolla, J. M. Dudley, L. Larger et al., Noise and chaos contributions in fast random bit sequence generated from broadband optoelectronic entropy sources, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.61, issue.3, pp.888-901, 2014.
URL : https://hal.archives-ouvertes.fr/hal-00938365

R. L. Devaney, An Introduction to Chaotic Dynamical Systems, 2003.

T. Stojanovski and L. Kocarev, Chaos-based random number generators-part i: analysis [cryptography, IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol.48, pp.281-288, 2001.

T. Addabbo, A. Fort, L. Kocarev, S. Rocchi, and V. Vignoli, Pseudo-chaotic lossy compressors for true random number generation, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.58, issue.8, pp.1897-1909, 2011.

Y. Liu, R. C. Cheung, and H. Wong, A bias-bounded digital true random number generator architecture. IEEE Transactions on Circuits and Systems I: Regular Papers, vol.64, pp.133-144, 2017.

. Vidya-rajagopalan, S. Boppana, . Dutta, R. Taylor, and . Wittig, Xilinx zynq-7000 epp-an extensible processing platform family, 23rd Hot Chips Symposium, pp.1352-1357, 2011.

S. Wiggins, Introduction to applied nonlinear dynamical systems and chaos, vol.2, 2003.

X. Fang, Q. Wang, C. Guyeux, and J. M. Bahi, Fpga acceleration of a pseudorandom number generator based on chaotic iterations, Journal of Information Security and Applications, vol.19, issue.1, pp.78-87, 2014.
URL : https://hal.archives-ouvertes.fr/hal-01303422

M. Jacques, X. Bahi, C. Fang, L. Guyeux, and . Larger, Fpga design for pseudorandom number generator based on chaotic iteration used in information hiding application, Appl. Math, vol.7, issue.6, pp.2175-2188, 2013.

B. Mohammed, J. Couchot, and C. Guyeux, Fpga implementation of f2-linear pseudorandom number generators based on zynq mpsoc: A chaotic iterations post processing case study, Proceedings of the 13th International Joint Conference on e-Business and Telecommunications, vol.4, pp.302-309, 2016.

M. Bakiri, J. Couchot, and C. Guyeux, One random jump and one permutation: Sufficient conditions to chaotic, statistically faultless, and large throughput prng for fpga, Proceedings of the 14th International Joint Conference on e-Business and Telecommunications, vol.6, pp.295-302, 2017.

M. Bakiri, J. F. Couchot, and C. Guyeux, Ciprng: A vlsi family of chaotic iterations post-processings for f-2 linear pseudorandom number generation based on zynq mpsoc, IEEE Transactions on Circuits and Systems I: Regular Papers, issue.99, pp.1-14, 2017.
URL : https://hal.archives-ouvertes.fr/hal-01992666

J. Bahi, C. Guyeux, and Q. Wang, A novel pseudo-random generator based on discrete chaotic iterations, INTERNET'09, 1-st Int. Conf. on Evolving Internet, pp.71-76, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00563299

S. Contassot, -. Vivier, J. Couchot, C. Guyeux, and P. Heam, Random walk in a n-cube without hamiltonian cycle to chaotic pseudorandom number generation: Theoretical and practical considerations, International Journal of Bifurcation and Chaos, vol.27, issue.01, p.1750014, 2017.
URL : https://hal.archives-ouvertes.fr/hal-01640515

D. E. Knuth, The Art of Computer Programming, Seminumerical Algorithms, vol.2, 1997.

. James-e-gentle, Random number generation and Monte Carlo methods, 2003.

C. Froberg and C. E. Frhoberg, Introduction to numerical analysis, 1969.

L. Michael-george, Pseudorandomness and cryptographic applications, 1996.

S. Even and Y. Mansour, A construction of a cipher from a single pseudorandom permutation, Journal of Cryptology, vol.10, issue.3, pp.151-161, 1997.

T. Elgamal, A public key cryptosystem and a signature scheme based on discrete logarithms, Advances in Cryptology, pp.10-18, 1985.

M. Henson and S. Taylor, Memory encryption: a survey of existing techniques, ACM Computing Surveys (CSUR), vol.46, issue.4, p.53, 2014.

L. Lamport, Constructing digital signatures from a one-way function, 1979.

C. E. Shannon, Communication theory of secrecy systems, Bell System Technical Journal, The, vol.28, issue.4, pp.656-715, 1949.

L. H. Tippett, Random Sampling Numbers, 1927.

M. Campbell-kelly, M. Croarken, R. Flood, and E. Robson, The history of mathematical tables, AMC, vol.10, p.12, 2005.

G. Maurice, B. Kendall, and . Smith, Randomness and random sampling numbers, Journal of the royal Statistical Society, pp.147-166, 1938.

. Simon-hugh-lavington, A history of Manchester computers, 1975.

W. George and . Brown, History of rand's random digits, summary, 1949.

. We-thomson, Ernie-a mathematical and statistical analysis, Journal of the Royal Statistical Society. Series A (General), pp.301-333, 1959.

N. Metropolis, The beginning of the monte carlo method, Los Alamos Science, vol.15, issue.584, pp.125-130, 1987.

H. Niederreiter and N. , Conference on Random Number Generation. Random number generation and quasi-Monte Carlo methods, 1992.

L. Pierre and . Ecuyer, Uniform random number generation, vol.53, pp.77-120, 1994.

D. Curtis, J. A. Motchenbacher, and . Connelly, Low-noise electronic system design, 1993.

L. Kleeman and A. Cantoni, Metastable behavior in digital systems, Design & Test of Computers, vol.4, issue.6, pp.4-19, 1987.
DOI : 10.1109/mdt.1987.295189

G. Hsieh and J. Hung, Phase-locked loop techniques. a survey. Industrial Electronics, IEEE Transactions on, vol.43, issue.6, pp.609-615, 1996.

A. Liacha, A. K. Oudjida, F. Ferguene, M. Bakiri, and M. L. Berrandjia, Design of high-speed, low-power, and area-efficient fir filters, IET Circuits, Devices Systems, vol.12, issue.1, pp.1-11, 2018.
DOI : 10.1049/iet-cds.2017.0058

A. K. Oudjida, D. Benamrouche, and M. Liem, Front-end ip development: Basic know-how, 2007 International Conference on Design Technology of Integrated Systems in Nanoscale Era, pp.60-63, 2007.
DOI : 10.1109/dtis.2007.4449493

H. Ross, H. Freeman, and . Hsieh, Distributed memory architecture for a configurable logic array and method for using distributed memory, US Patent, vol.5, p.406, 1994.

. Philip-m-freidin, Logic block with look-up table for configuration and memory, US Patent, vol.5, p.377, 91995-05.

E. Barker and A. Roginsky, Draft NIST special publication 800-131 recommendation for the transitioning of cryptographic algorithms and key sizes, 2010.

G. Marsaglia, The diehard test suite, 1995.

L. Pierre, R. Ecuyer, and . Simard, Testu01: Ac library for empirical testing of random number generators, ACM Transactions on Mathematical Software (TOMS), vol.33, issue.4, p.22, 2007.

P. Ecuyer and F. Panneton, Fast random number generators based on linear recurrences modulo 2: overview and comparison, Proceedings of the Winter Simulation Conference, p.10, 2005.

M. Matsumoto and T. Nishimura, Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator, ACM Transactions on Modeling and Computer Simulation (TOMACS), vol.8, issue.1, pp.3-30, 1998.
DOI : 10.1145/272991.272995

URL : http://ir.lib.hiroshima-u.ac.jp/files/public/1/15032/20141016122634147579/ACMTraModel_8_3.pdf

. Robert-c-tausworthe, Random numbers generated by linear recurrence modulo two, Mathematics of Computation, vol.19, issue.90, pp.201-209, 1965.

E. Donald and . Knuth, Deciphering a linear congruential encryption, IEEE Transactions on Information Theory, vol.31, issue.1, pp.49-52, 1985.

G. Theodore, . Lewis, H. William, and . Payne, Generalized feedback shift register pseudorandom number algorithm, Journal of the ACM (JACM), vol.20, issue.3, pp.456-468, 1973.

M. Matsumoto and Y. Kurita, Twisted gfsr generators, ACM Transactions on Modeling and Computer Simulation (TOMACS), vol.2, issue.3, pp.179-194, 1992.
DOI : 10.1145/146382.146383

URL : http://ir.lib.hiroshima-u.ac.jp/files/public/1/15037/20141016122638619634/ACMTraModel_2_179.pdf

S. George, . Fishman, and I. Louis-r-moore, An exhaustive analysis of multiplicative congruential random number generators with modulus 2?31-1, SIAM Journal on Scientific and Statistical Computing, vol.7, issue.1, pp.24-45, 1986.

S. Banks, P. Beadling, and A. Ferencz, Fpga implementation of pseudo random number generators for monte carlo methods in quantitative finance, Reconfigurable Computing and FPGAs, 2008. ReConFig'08. International Conference on, pp.271-276, 2008.

H. William and . Press, Numerical recipes 3rd edition: The art of scientific computing, 2007.

G. Marsaglia, Xorshift rngs, Journal of Statistical Software, vol.8, issue.14, pp.1-6, 2003.
DOI : 10.18637/jss.v008.i14

URL : https://www.jstatsoft.org/index.php/jss/article/view/v008i14/xorshift.pdf

G. Marsaglia and A. Zaman, A new class of random number generators, The Annals of Applied Probability, pp.462-480, 1991.

A. K. Oudjida and N. Chaillet, Radix-2 r arithmetic for multiplication by a constant. Circuits and Systems II: Express Briefs, IEEE Transactions on, vol.61, issue.5, pp.349-353, 2014.
URL : https://hal.archives-ouvertes.fr/hal-01002468

A. K. Oudjida, A. Liacha, M. Bakiri, and N. Chaillet, Multiple constant multiplication algorithm for high-speed and low-power design, IEEE Transactions on Circuits and Systems II: Express Briefs, vol.63, issue.2, pp.176-180, 2016.

A. K. Oudjida, N. Chaillet, and M. L. Berrandjia, Radix-2r arithmetic for multiplication by a constant: Further results and improvements. Circuits and Systems II: Express Briefs, IEEE Transactions on, vol.62, issue.4, pp.372-376, 2015.

S. Raj, . Katti, K. Sudarshan, and . Srinivasan, Efficient hardware implementation of a new pseudo-random bit sequence generator, IEEE International Symposium on, pp.1393-1396, 2009.

E. Erkek and T. Tuncer, The implementation of asg and sg random number generators, System Science and Engineering (ICSSE), 2013 International Conference on, pp.363-367, 2013.

F. Victor-r-gonzalez-diaz, G. Pareschi, F. Setti, and . Maloberti, A pseudorandom number generator based on time-variant recursion of accumulators. Circuits and Systems II: Express Briefs, IEEE Transactions on, vol.58, issue.9, pp.580-584, 2011.

V. Friedman, The structure of the limit cycles in sigma delta modulation, IEEE Transactions on, vol.36, issue.8, pp.972-979, 1988.

F. Maloberti, E. Bonizzoni, and A. Surano, Time variant digital sigma-delta modulator for fractional-n frequency synthesizers, Radio-Frequency Integration Technology, pp.111-114, 2009.

B. David, W. Thomas, and . Luk, Fpga-optimised high-quality uniform random number generators, Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays, pp.235-244, 2008.

B. David, W. Thomas, and . Luk, Fpga-optimised uniform random number generators using luts and shift registers, Field Programmable Logic and Applications (FPL), 2010 International Conference on, pp.77-82, 2010.

B. David, W. Thomas, and . Luk, The lut-sr family of uniform random number generators for fpga architectures. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.21, issue.4, pp.761-770, 2013.

S. Chandrasekaran and A. Amira, High performance fpga implementation of the mersenne twister, Electronic Design, Test and Applications, pp.482-485, 2008.

X. Tian and K. Benkrid, Mersenne twister random number generation on fpga, cpu and gpu, AHS 2009. NASA/ESA Conference on, pp.460-464, 2009.
DOI : 10.1109/ahs.2009.11

J. Ishaan-l-dalal, D. Harwayne-gidansky, and . Stefan, On the fast generation of long-period pseudorandom number sequences, Systems, Applications and Technology Conference, pp.1-9, 2008.

M. Saito and M. Matsumoto, Simd-oriented fast mersenne twister: a 128-bit pseudorandom number generator, Monte Carlo and Quasi-Monte Carlo Methods, pp.607-622, 2006.

Y. Li, J. Jiang, H. Cheng, M. Zhang, and S. Wei, An efficient hardware random number generator based on the mt method, Computer and Information Technology (CIT), pp.1011-1015, 2012.

S. Wu, J. Jiang, and Y. Fu, Hardware architecture for the parallel generation of long-period random numbers using mt method, Computer Engineering and Technology, pp.8-15, 2013.

P. Echeverría and M. López-vallejo, High performance fpga-oriented mersenne twister uniform random number generator, Journal of Signal Processing Systems, vol.71, issue.2, pp.105-109, 2013.

A. W. John-von-neumann and . Burks, Theory of self-reproducing automata, IEEE Transactions on Neural Networks, vol.5, issue.1, pp.3-14, 1966.

J. Gleick, Chaos: Making a new science, 1997.

P. Anghelescu, E. Sofron, and S. Ionita, Vlsi implementation of high-speed cellular automata encryption algorithm, Semiconductor Conference, vol.2, pp.509-512, 2007.

I. Dogaru and R. Dogaru, Algebraic normal form for rapid prototyping of elementary hybrid cellular automata in fpga, Electrical and Electronics Engineering (ISEEE), 2010 3rd International Symposium on, pp.277-280, 2010.

D. Ioana and D. Radu, Fpga implementation and evaluation of two cryptographically secure hybrid cellular automata, 10th International Conference on, pp.1-4, 2014.

E. Thomas and . Tkacik, A hardware random number generator, Cryptographic Hardware and Embedded Systems-CHES 2002, pp.450-453, 2003.

C. Juan, C. D. Cerda, J. M. Martinez, D. Comer, and . Hoe, An efficient fpga random number generator using lfsrs and cellular automata, IEEE 55th International Midwest Symposium on, pp.912-915, 2012.

S. Sheng-uei-guan and . Tan, Pseudorandom number generator-the self programmable cellular automata, Knowledge-Based Intelligent Information and Engineering Systems, pp.1230-1235, 2003.

M. Jonathan, J. C. Comer, C. D. Cerda, D. Martinez, and . Hoe, Random number generators using cellular automata implemented on fpgas, System Theory (SSST), 2012 44th Southeastern Symposium on, pp.67-72, 2012.

L. Raut, H. K. David, and . Hoe, Stream cipher design using cellular automata implemented on fpgas, System Theory (SSST), 2013 45th Southeastern Symposium on, pp.146-149, 2013.

M. David, C. Damith, T. Ranasinghe, and . Larsen, A2u2: a stream cipher for printed electronics rfid tags, RFID (RFID), pp.176-183, 2011.

L. Kotoulas and D. Tsarouchis, Georgios Ch Sirakoulis, and Ioannis Andreadis. 1-d cellular automaton for pseudorandom number generation and its reconfigurable hardware implementation, Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, p.4, 2006.

M. Louis, T. Pecora, and . Carroll, Synchronization in chaotic systems, Physical review letters, vol.64, issue.8, p.821, 1990.

M. Robert and . May, Simple mathematical models with very complicated dynamics, Nature, vol.261, issue.5560, pp.459-467, 1976.

M. Hénon, A two-dimensional mapping with a strange attractor, Communications in Mathematical Physics, vol.50, issue.1, pp.69-77, 1976.

P. Dabal and R. Pelka, A chaos-based pseudo-random bit generator implemented in fpga device, Design and Diagnostics of Electronic Circuits & Systems (DDECS), pp.151-154, 2011.
DOI : 10.1109/ddecs.2011.5783069

, IEEE, 2011.

W. T. Padgett and D. V. Anderson, Synthesis lectures on signal processing, 2009.

P. Dabal and R. Pelka, Fpga implementation of chaotic pseudo-random bit generators, Mixed Design of Integrated Circuits and Systems, p.2012

, Proceedings of the 19th International Conference, pp.260-264, 2012.

P. Dabal and R. Pelka, A study on fast pipelined pseudo-random number generator based on chaotic logistic map, 17th International Symposium on Design and Diagnostics of Electronic Circuits Systems, pp.195-200, 2014.
DOI : 10.1109/ddecs.2014.6868789

A. Pande and J. Zambreno, Design and hardware implementation of a chaotic encryption scheme for real-time embedded systems, Signal Processing and Communications (SPCOM), 2010 International Conference on, pp.1-5

. Ieee, , 2010.

S. Liu, J. Sun, Z. Xu, and Z. Cai, An improved chaos-based stream cipher algorithm and its vlsi implementation, Networked Computing and Advanced Information Management, vol.2, pp.191-197, 2008.
DOI : 10.1109/ncm.2008.11

L. Merah, A. Adda, H. Naima, and . Said, Coupling two chaotic systems in order to increasing the security of a communication system-study and real time fpga implementation

P. Giard, G. Kaddoum, F. Gagnon, and C. Thibeault, Fpga implementation and evaluation of discrete-time chaotic generators circuits, IECON 2012-38th Annual Conference on IEEE Industrial Electronics Society, pp.3221-3224, 2012.
DOI : 10.1109/iecon.2012.6389382

T. Geisel and . Fairen, Statistical properties of chaos in chebyshev maps, Physics Letters A, vol.105, issue.6, pp.263-266, 1984.

Y. Mao, L. Cao, and W. Liu, Design and fpga implementation of a pseudorandom bit sequence generator using spatiotemporal chaos, Communications, Circuits and Systems Proceedings, 2006 International Conference on, vol.3, pp.2114-2118, 2006.
DOI : 10.1109/icccas.2006.284916

J. Cernák, Digital generators of chaos, Physics letters A, vol.214, issue.3, pp.151-160, 1996.

C. Li, J. Chen, and T. Chang, A chaos-based pseudo random number generator using timing-based reseeding method, Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on, p.4, 2006.

R. G. , Simultaneous carry adder, US Patent, vol.2, p.305, 1960.

C. Li, Y. Chen, T. Chang, L. Deng, and K. To, Period extension and randomness enhancement using high-throughput reseedingmixing prng. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.20, issue.2, pp.385-389, 2012.
DOI : 10.1109/tvlsi.2010.2103332

L. Deng, Efficient and portable multiple recursive generators of large order, ACM Transactions on Modeling and Computer Simulation (TOMACS), vol.15, issue.1, pp.1-13, 2005.

T. Oshiba, Closure property of family of context-free languages under cyclic shift operation, ELECTRONICS & COMMUNICATIONS IN JAPAN, vol.55, issue.4, pp.119-122, 1972.

J. John and . Shedletsky, Comment on the sequential and indeterminate behavior of an end-around-carry adder, IEEE Transactions on Computers, vol.26, issue.3, pp.271-272, 1977.

N. Hariprasad, Fpga implementation of a cryptography technology using pseudo random number generator, In International Journal of Engineering Research and Technology, vol.2, 2013.

O. E. Rössler, An equation for continuous chaos, Physics Letters A, vol.57, issue.5, pp.397-398, 1976.

R. Thomas, V. Basios, M. Eiswirth, T. Kruel, and O. E. Rössler, Hyperchaos of arbitrary order generated by a single feedback circuit, and the emergence of chaotic walks, Chaos: An Interdisciplinary Journal of Nonlinear Science, vol.14, issue.3, pp.669-674, 2004.

H. Guo and -. Si, A hyperchaotic attractor with multiple positive lyapunov exponents, Chinese Physics Letters, vol.26, issue.12, p.120501, 2009.

S. Ahmed, M. P. Elwakil, and . Kennedy, Construction of classes of circuitindependent chaotic oscillators using passive-only nonlinear devices. Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on, vol.48, issue.3, pp.289-307, 2001.

A. S. Elwakil and . Kennedy, Chaotic oscillator configuration using a frequency dependent negative resistor, International journal of circuit theory and applications, vol.28, issue.1, pp.69-76, 2000.
DOI : 10.1109/iscas.1999.777593

. M-affan-zidan, Ahmed Gomaa Radwan, and Khaled Nabil Salama. The effect of numerical techniques on differential equation based chaotic generators, Microelectronics (ICM), 2011 International Conference on, pp.1-4, 2011.

G. Chen and . Lü, Dynamics of the lorenz system family: analysis, control and synchronization, 2003.

. Py-tsai, T. T. Cl-merkle, and . Huang, Euler equation analysis of the propeller-wake interaction, Symposium on Naval Hydrodynamics, 17th, 1900.

C. Preston and . Hammer, The midpoint method of numerical integration, Mathematics Magazine, vol.31, issue.4, pp.193-195, 1958.

C. John and . Butcher, Numerical methods for ordinary differential equations in the 20th century, Journal of Computational and Applied Mathematics, vol.125, issue.1, pp.1-29, 2000.

A. M-affan-zidan, K. Gomaa-radwan, and . Salama, Random number generation based on digital differential chaos, IEEE 54th International Midwest Symposium on, pp.1-4, 2011.

E. J. , Latched carry save adder circuit for multipliers, US Patent, vol.3, p.388, 1967.

C. S. Wallace, A suggestion for a fast multiplier, IEEE Transactions on Electronic Computers, EC, vol.13, issue.1, pp.14-17, 1964.

M. L. Abhinav-s-mansingka, . Barakat, . M-affan-zidan, K. Ahmed-g-radwan, and . Salama, Fibonacci-based hardware post-processing for non-autonomous signum hyperchaotic system, IT Convergence and Security (ICITCS), 2013 International Conference on, pp.1-4, 2013.

B. Basab, K. Purkayastha, and . Sarma, Digital phase-locked loop, A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel, pp.103-126, 2015.

V. Fischer and M. Drutarovsk, Drutarovsk`y. True random number generator embedded in reconfigurable hardware, Cryptographic Hardware and Embedded Systems-CHES 2002, pp.415-430, 2003.

M. ?imka, M. Drutarovsk, `. Drutarovsk`y, and V. Fischer, Embedded true random number generator in actel fpgas, Workshop on Cryptographic Advances in Secure Hardware-CRASH, pp.6-7, 2005.

M. Simka, M. Drutarovsk, `. Drutarovsk`y, and V. Fischer, Testing of pll-based true random number generator in changingworking conditions, RADIOENGINEERING, vol.20, pp.94-101, 2011.
URL : https://hal.archives-ouvertes.fr/ujm-00667723

M. Varchola, M. Drutarovsky, R. Fouquet, and V. Fischer, Hardware platform for testing performance of trngs embedded in actel fusion fpga, 18th International Conference, pp.1-4, 2008.
URL : https://hal.archives-ouvertes.fr/ujm-00305499

P. Kohlbrenner and K. Gaj, An embedded true random number generator for fpgas, Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays, pp.71-78, 2004.

C. Klein, O. Cret, and A. Suciu, Design and implementation of a high quality and high throughput trng in fpga, 2009.

M. Dichtl and J. D. Goli´cgoli´c, High-speed true random number generation with logic gates only, 2007.

A. Cherkaoui, V. Fischer, A. Aubert, and L. Fesquet, A selftimed ring based true random number generator, Asynchronous Circuits and Systems (ASYNC), pp.99-106, 2013.
URL : https://hal.archives-ouvertes.fr/ujm-00840593

, IEEE, 2013.

A. Cherkaoui, V. Fischer, A. Aubert, and L. Fesquet, Comparison of self-timed ring and inverter ring oscillators as entropy sources in fpgas, Design, Automation & Test in Europe Conference & Exhibition (DATE), pp.1325-1330, 2012.
URL : https://hal.archives-ouvertes.fr/ujm-00667639

A. Cherkaoui, V. Fischer, L. Fesquet, and A. Aubert, A very high speed true random number generator with entropy assessment, Cryptographic Hardware and Embedded Systems-CHES 2013, pp.179-196, 2013.
URL : https://hal.archives-ouvertes.fr/ujm-00859906

E. Ivan, . Sutherland, and . Micropipelines, Communications of the ACM, vol.32, issue.6, pp.720-738, 1989.

I. Vasyltsov, E. Hambardzumyan, Y. Kim, and B. Karpinskyy, Fast digital trng based on metastable ring oscillator, Cryptographic Hardware and Embedded Systems-CHES 2008, pp.164-180, 2008.

M. Majzoobi, F. Koushanfar, and S. Devadas, Fpga-based true random number generation using circuit metastability with adaptive feedback control, Cryptographic Hardware and Embedded Systems-CHES 2011, pp.17-32, 2011.

E. Salman, A. Dasdan, F. Taraporevala, K. Kucukcakar, and . Eby-g-friedman, Exploiting setup-hold-time interdependence in static timing analysis. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol.26, issue.6, pp.1114-1125, 2007.

D. Lee, H. Seo, and H. Kim, Metastability-based feedback method for enhancing fpga-based trng, International Journal of Multimedia & Ubiquitous Engineering, vol.9, issue.3, 2014.

, National institute of standards and technology (nist): Fips140 ? 1: Security requirements for cryptographic modules @ONLINE, 1994.

, National institute of standards and technology (nist): A statistical test suite for random and pseudorandom number generators for cryptographic applications @ONLINE, 2010.

W. Killmann and W. Schindler, A proposal for: Functionality classes and evaluation methodology for true (physical) random number generators. T-Systems debis Systemhaus Information Security Services and Bundesamt für Sicherheit in der Informationstechnik (BSI), 2001.

, National institute of standards and technology (nist): Fips140 ? 2: Security requirements for cryptographic modules @ONLINE, 2001.

D. E. Knuth, The Art of Computer Programming, Seminumerical Algorithms, vol.2, 1997.

A. Canteaut, Berlekamp-massey algorithm, Encyclopedia of Cryptography and Security, pp.80-80, 2011.

A. I-zarei-moghadam, M. Shokouhi-rostami, and . Tanhatalab, Designing a random number generator with novel parallel lfsr substructure for key stream ciphers, Computer Design and Applications (ICCDA), 2010 International Conference on, vol.5, pp.5-598, 2010.

D. B. Thomas and W. Luk, Fpga-optimised uniform random number generators using luts and shift registers, 2010 International Conference on Field Programmable Logic and Applications, pp.77-82, 2010.

K. H. Kuen-hung-tsoi, P. Leung, and . Leong, Compact fpga-based true and pseudo random number generators, Field-Programmable Custom Computing Machines, 2003. FCCM 2003. 11th Annual IEEE Symposium on, pp.51-61

, IEEE, 2003.

C. Li, J. Chen, and T. Chang, A chaos-based pseudo random number generator using timing-based reseeding method, 2006 IEEE International Symposium on Circuits and Systems, pp.4-3280, 2006.

C. Y. Li, Y. H. Chen, T. Y. Chang, L. Y. Deng, and K. To, Period extension and randomness enhancement using high-throughput reseeding-mixing prng, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.20, issue.2, pp.385-389, 2012.

Z. Zhu and H. Hu, A dynamic nonlinear transform arithmetic for improving the properties chaos-based prng, Intelligent Control and Automation (WCICA), 2010 8th World Congress on, pp.7055-7060, 2010.

D. B. Thomas and W. Luk, The lut-sr family of uniform random number generators for fpga architectures, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.21, issue.4, pp.761-770, 2013.

V. Bonato, F. Bruno, and . Mazzotti, Marcio Merino Fernandes, and Eduardo Marques. A mersenne twister hardware implementation for the monte carlo localization algorithm, Journal of Signal Processing Systems, vol.70, issue.1, pp.75-85, 2013.

P. Dabal and R. Pelka, Fpga implementation of chaotic pseudo-random bit generators, Proceedings of the 19th International Conference Mixed Design of Integrated Circuits and Systems -MIXDES 2012, pp.260-264, 2012.

J. Couchot, Modèles discrets pour la sécurité informatique: des méth-odes itératives à l'analyse vectorielle, 2017.

C. Guyeux, Le désordre des itérations chaotiques et leur utilité en sécurité informatique. Theses, 2010.

T. Y. Li and J. A. Yorke, Period three implies chaos, Amer. Math. Monthly, vol.82, issue.10, pp.985-992, 1975.

S. Contassot, -. Vivier, J. Couchot, C. Guyeux, and P. Heam, Random walk in a n-cube without hamiltonian cycle to chaotic pseudorandom number generation: Theoretical and practical considerations, International Journal of Bifurcation and Chaos, 2016.
URL : https://hal.archives-ouvertes.fr/hal-01640515

J. Bahi, R. Couturier, C. Guyeux, and P. Héam, Efficient and cryptographically secure generation of chaotic pseudorandom numbers on gpu, The journal of Supercomputing, vol.71, issue.10, pp.3877-3903, 2015.
URL : https://hal.archives-ouvertes.fr/hal-02131117

. Knudsen, Chaos without nonperiodicity. Amer. Math. Monthly, vol.101, 1994.

J. Cong, B. Liu, S. Neuendorffer, and J. Noguera, High-level synthesis for fpgas: From prototyping to deployment. Computer-Aided Design of Integrated Circuits and Systems, Kees Vissers, and Zhiru Zhang, vol.30, pp.473-491, 2011.

A. Rainer and . Rueppel, Linear complexity and random sequences, Advances in Cryptology-EUROCRYPT'85, pp.167-188, 1985.

U. Meyer-baese and U. Meyer-baese, Digital signal processing with field programmable gate arrays, vol.65, 2007.

A. Hasan and C. Negre, Sequential multiplier with sub-linear gate complexity, Journal of Cryptographic Engineering, vol.2, issue.2, pp.91-97, 2012.
URL : https://hal.archives-ouvertes.fr/hal-00712085

M. Jacques, J. Bahi, C. Couchot, Q. Guyeux, and . Wang, Class of trustworthy pseudo-random number generators, 2011.

C. Guyeux and J. Bahi, An improved watermarking algorithm for internet applications, INTERNET'2010. The 2nd Int. Conf. on Evolving Internet, pp.119-124, 2010.
DOI : 10.1109/internet.2010.29

URL : https://hal.archives-ouvertes.fr/hal-00563314

M. A. Zidan, A. G. Radwan, and K. N. Salama, The effect of numerical techniques on differential equation based chaotic generators, ICM 2011 Proceeding, pp.1-4, 2011.

P. Giard, G. Kaddoum, F. Gagnon, and C. Thibeault, Fpga implementation and evaluation of discrete-time chaotic generators circuits, IECON 2012 -38th Annual Conference on IEEE Industrial Electronics Society, pp.3221-3224, 2012.

J. Couchot, P. Heam, C. Guyeux, Q. Wang, and J. M. Bahi, Pseudorandom number generators with balanced gray codes, Security and Cryptography (SECRYPT), pp.1-7, 2014.

. Melissa-e-o&apos;neill and . Pcg, General random number generator architecture, A family of simple fast space-efficient statistically good algorithms for random number generation, vol.1, pp.1-46, 1988.

, Block-level model of a w-bit digital accumulator PRNG comprising n stages 26

, PRNG: (a) maps each row of the recurrence matrix as a XOR gate using LUT-FF, (b) uses RAM block memory as k × k FIFO to store the recursive sequences, (c) loads the state in FIFO based shift-register SR instead of BRAM, (d) cascading of any number of Xilinx SRL32 to create a k-bit SR, LUT based shift-register and FIFO FPGA

, Twisted Generalized Feedback Shift Register architecture: at each recurrence operation t, it computes x t+N thanks to the three words x t , x t+1 , and x t+m and generates the output with tempering function, p.28

. .. , Mersenne Twister MT19937 architecture using 3R/1W BRAM: at each cycle, R/W address is even address for BRAM0 and odd for BRAM1, p.30

. .. , R) for Mersenne Twister PRNG: (a) using BRAM configured as 3R/1W, (b) using Circular Buffer of registers (L.R is linear recurrence of transferring function of MT), p.31

, Self-Programmable cellular automata generator: uses a super-rule 90/156 to dynamically determines when the rules have to change in each CA cell, p.32

, Chaotic based Timing Reseeding PRNG: masking the current state x t+1 at a specific time (fixed point between the two register states is reached), p.35

, Phase-Locked Loop TRNG: detecting the jitter by sampling the reference clock signal T CLK using a correlated signal T CLJ synthesized in the PLL, vol.37

, Self-Timed ring architecture: at each ring stage L (Muller gate and an inverter), the jitter is propagated forward if y t = y t+1 or conversely backward, when the output is the XOR of each, p.39

, 14 (a) TRNG based on the metastability of multistage architecture inverter ring oscillator, (b) The timing switching connectivity between the IRO stages following the metastability mode "MS" and the generation mode, p.40

, 15 (a) The setup (ST) and hold (HT) scenarios operations in Flip-Flop, (b) the output probability depending the delay difference (?) of the input signal, p.41

. .. Non-lineair-prngs-fpga-hardware-analysis, , p.45

. .. , TRNGs FPGA implementation analysis: Throughput (Mbps), vol.46

, ? ((x 1 + x 2 ).x 3 , x 1 .x 3 , x 1 +x 2 +x 3 ). We notice the cycle, Graphs of iterations function f : B 3 ? B 3 such that, vol.111

, Linear Complexity profiles L k (x i ) using Berlekamp-Massey algorithm, p.60

, Jump Computation for 32 bits of random: number of jumps < 2 lead to a perfect (k + 1)/2) for k-sequences, p.61

, L(k?1) ? 2], b) other Jump =[L(k)?L(k?1) > 2], c) Unstable Jump= [L(k)?L(k?1) L(k)], d) stable jump=, Jump computation before TestU01 of 200 linear complexity Level: a) Perfect Jump = [0 < L(k)?

, Latency vs. throughput in two MT implementations: read three words X i , X i+1 , and XM (middle) from two BRAM memories M0 and M1 and write the output

. .. , Detailed Zynq based SoC implementation for PRNG, p.70

. Axi and . .. Fpga, , p.71

, General ASIC Flow based on Cadence Tools

.. .. The,

F. Diehard and N. .. , Statistical Tests Analysis, p.48

A. .. Bigcrush, Statistical Tests Analysis: TestU01 Crush and, p.48

, ? ((x 1 + x 2 ).x 3 , x 1 .x 3 , x 1 + x 2 + x 3 ), Map of

, 2 FPGA implementation of linear PRNG in term of: Area, Speed, and Statistical tests

, FPGA Implementation of CIPRNG-MC iteration post-processing using different linear PRNG as strategy

, FPGA Implementation of CIPRNG-XOR post-processing using different linear prng as strategy

, FPGA implementation of Multi-Cycle Multi-Dimension chaotic iteration post-processing based for MT and TT800

, 65nm ASIC Implementation of CIPRNG-MC post-processing using different linear prng as strategy

, 65nm ASIC Implementation of CIPRNG-XOR post-processing using different linear prng as strategy

, Statistical test of NIST for different FPGA implementations of CIPRNG-XOR: a 100 sequences of 10 6 bits are generated and tested and p-value > 0.0001 being required to pass a test, p.85

, Statistical test of NIST for different FPGA implementation of CIPRNG-MC: a 100 sequences of 10 6 bits are generated and tested and p-value > 0.0001 being required to pass a test, p.85

.. .. Boolean,

, FPGA Implementation of 32-bits GCI PRNG using different linear PRNG as strategy

, FPGA Implementation of 64-bits GCI PRNG using different linear PRNG as strategy

, Document generated with L AT E X and: the L AT E X style for PhD Thesis created by S. Galland

E. Doctoral and S. , Université Bourgougne Franch-Comté 32, Avenue de l'observatoire, 25000, Besançon Cedex ed-spim@univ-fcomte.fr