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Reconfigurable hardware acceleration of CNNs on FPGA-based smart cameras

Abstract : Deep Convolutional Neural Networks (CNNs) have become a de-facto standard in computer vision. This success came at the price of a high computational cost, making the implementation of CNNs, under real-time constraints, a challenging task.To address this challenge, the literature exploits the large amount of parallelism exhibited by these algorithms, motivating the use of dedicated hardware platforms. In power-constrained environments, such as smart camera nodes, FPGA-based processing cores are known to be adequate solutions in accelerating computer vision applications. This is especially true for CNN workloads, which have a streaming nature that suits well to reconfigurable hardware architectures.In this context, the following thesis addresses the problems of CNN mapping on FPGAs. In Particular, it aims at improving the efficiency of CNN implementations through two main optimization strategies; The first one focuses on the CNN model and parameters while the second one considers the hardware architecture and the fine-grain building blocks.
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Submitted on : Wednesday, March 13, 2019 - 3:34:10 PM
Last modification on : Friday, March 15, 2019 - 1:12:57 AM
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  • HAL Id : tel-02066643, version 1


Kamel Abdelouahab. Reconfigurable hardware acceleration of CNNs on FPGA-based smart cameras. Electronics. Université Clermont Auvergne, 2018. English. ⟨NNT : 2018CLFAC042⟩. ⟨tel-02066643⟩



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