Skip to Main content Skip to Navigation
Theses

Power amplifier design for 5G applications in 28nm FD-SOI technology

Abstract : The 5G future mobile network is planned to be deployed from 2020, in a context of exponential mobile market and exchanged data volume evolution. The 5G will leverage revolutionary applications for the advent of the connected world. For this purpose, several network specifications are expected notably low latency, reduced power consumption and high data-rates even if no standard is yet defined. The frequency bands traditionally used for mobile networks will not permit the needed performances and several mmW frequency bands are under study to create a complementary frequency spectrum. However, these mmW frequency bands suffer from large attenuation inbuilding material and in free-space. Therefore, several techniques will be implemented to tackle these limitations indense urban areas like backhauling, FD-MIMO and beamforming phased array. This is leading to a large number of transceivers for base stations and end-user devices. CMOS technology offers undeniable advantages for this mass market while FD-SOI technology offers additional features and performances. The power amplifier is the most critical block to design in a transceiver and is also the most power consuming. To address the 5G challenges, several specifications concerning power consumption, linearity and efficiency are expected. The environment variations inbeamforming phased array and the industrial context drive the need for robust topologies while power amplifier reconfigurability is benefic in a context of adaptive circuits. This thesis addresses these challenges by exploring the conception of a robust and reconfigurable power amplifier targeting 5G applications while integrating specific design techniques and taking advantage of 28nm FD-SOI CMOS technology features for reconfigurability purposes.
Document type :
Theses
Complete list of metadatas

https://tel.archives-ouvertes.fr/tel-02057987
Contributor : Abes Star :  Contact
Submitted on : Tuesday, March 5, 2019 - 5:06:06 PM
Last modification on : Tuesday, May 14, 2019 - 4:55:15 PM
Long-term archiving on: : Thursday, June 6, 2019 - 6:13:16 PM

File

TORRES_FLORENT_2018.pdf
Version validated by the jury (STAR)

Identifiers

  • HAL Id : tel-02057987, version 1

Citation

Florent Torres. Power amplifier design for 5G applications in 28nm FD-SOI technology. Electronics. Université de Bordeaux, 2018. English. ⟨NNT : 2018BORD0064⟩. ⟨tel-02057987⟩

Share

Metrics

Record views

437

Files downloads

769