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Développement d'une solution Core-chip MMIC avec convertisseur série-parallèle intégré en technologie BiCMOS pour la formation des faisceaux pour antennes agiles

Matthieu Gastaldi 1
1 LAAS-MINC - Équipe MIcro et Nanosystèmes pour les Communications sans fil
LAAS - Laboratoire d'analyse et d'architecture des systèmes
Abstract : This R&T CNES project concerns the design and realization of a Core-chip MMIC system integrated in SiGe BiCMOS technology. The MMIC core-chip system is dedicated to the beamforming for the active satellite antenna. The new solutions for the satellite payloads being developed for telecommunication applications need an increased flexibility at all the levels. More precisely, the system of active antennas allowing an adjustment by real-time electronic command of the terrestrial covered area offers an optimized response for the communication link budget. This performance has a cost: the necessity of a very large number of RF control points "amplitude / phase" of the beamforming equipment which power the active antenna matrix elements. So, it becomes mandatory to bring a new solution to optimize this function. The main challenges are: increasing the functions integration, decreasing the DC power consumption and keeping the RF performances in terms of gain, resolution and linearity.
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Matthieu Gastaldi. Développement d'une solution Core-chip MMIC avec convertisseur série-parallèle intégré en technologie BiCMOS pour la formation des faisceaux pour antennes agiles. Electronique. INSA de Toulouse, 2016. Français. ⟨NNT : 2016ISAT0046⟩. ⟨tel-02003461⟩

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