. .. , 94 4.2 État de l'art des implantations de HECC sur FPGA, p.99

. .. , Objectifs et contraintes de nos accélérateurs matériels, p.102

. .. Accélérateurs, Choix des unités et exploration d'architectures d'

.. .. Architectures, 5.2 Architecture A2 : optimisation de l'unité

.. .. Comparaisons,

, Nouveaux accélérateurs utilisant la version F44B de HTMM, p.131

.. .. Conclusions,

G. Gallin, T. O. Celik, and A. Tisserand, Architecture level optimizations for Kummer based HECC on FPGAs, Proc. 18th International Conference on Cryptology in India (Indocrypt), vol.94, p.135, 2017.
DOI : 10.1007/978-3-319-71667-1_3

URL : https://hal.archives-ouvertes.fr/hal-01614063

G. Gallin and A. Tisserand, Camera ready at https://hal. archives-ouvertes.fr/hal-01620046, Asilomar Conference on Signals, Systems and Computers, vol.133, p.136, 2017.

G. Gallin and A. Tisserand, Generation of hyper-threaded GF(P) multipliers for flexible curve based cryptography on FPGAs, IEEE Transactions on Computers, vol.132, p.136, 2018.

G. Gallin and A. Tisserand, Generator for hyper-threaded modular multipliers, vol.58, p.136, 2018.
DOI : 10.1109/acssc.2017.8335378

URL : https://hal.archives-ouvertes.fr/hal-01620046/file/article-asilomar17-htmm.pdf

, Références non citées

G. Gallin, Architectures matérielles pour la cryptographie sur courbes hyper-elliptiques, Séminaire sécurité des systèmes électroniques embarqués DGA -IRISA, 2017.

G. Gallin and A. Tisserand, Comparaison expérimentale d'architectures de cryptoprocesseurs pour courbes elliptiques et hyper-elliptiques, Journées nationales Codage et Cryptographie (JC2), 2015.

G. Gallin and A. Tisserand, Hardware and arithmetic for hyperelliptic curves cryptography, Colloque annuel international du labex CominLabs, 2016.
URL : https://hal.archives-ouvertes.fr/hal-01404755

G. Gallin and A. Tisserand, Architecture level optimizations for Kummer based HECC on FPGAs, 15th International Workshop on cryptographic architectures embedded in logic devices (CryptArchi), 2017.
DOI : 10.1007/978-3-319-71667-1_3

URL : https://hal.archives-ouvertes.fr/hal-01614063

G. Gallin and A. Tisserand, Finite field multiplier architectures for hyper-elliptic curve cryptography. 12ème Colloque national du GDR SOC2, 2017.
URL : https://hal.archives-ouvertes.fr/hal-01539852

P. M. Massolino, L. Batina, R. Chaves, and N. Mentens, Area-optimized Montgomery multiplication on IGLOO2 FPGAs, Internat. Conf. Field Programmable Logic and Applications (FPL), vol.59, p.78, 2017.

A. Mrabet, N. El-mrabet, R. Lashermes, J. Rigaud, B. Bouallegue et al., A scalable and systolic architectures of Montgomery modular multiplication for public key cryptosystems based on DSPs, Journal of Hardware and Systems Security, vol.1, issue.3, p.78, 2017.
URL : https://hal.archives-ouvertes.fr/hal-01579811

R. C. Merkle, Secure communications over insecure channels, Communications of the ACM, vol.21, issue.4, p.3, 1978.

J. Métairie, m ) et leurs applications à la cryptographie sur courbes elliptiques, Contributions aux opérateurs arithmétiques GF, p.17, 2016.

V. S. Miller, Use of elliptic curves in cryptography, Proc. Conference on the Theory and Application of Cryptographic techniques -Advances in Cryptology (CRYPTO), vol.218, p.14, 1985.

Y. Ma, Z. Liu, W. Pan, and J. Jing, A high-speed elliptic curve cryptographic processor for generic curves over GF(p), Proc. International Workshop on Selected Areas in Cryptography (SAC), vol.8282, p.129, 2013.

C. Mcivor, M. Mcloone, and J. Mccanny, FPGA Montgomery modular multiplication architectures suitable for ECCs over GF(p), IEEE Internat. Symp. on Circuits and Systems (ISCAS), vol.3, p.54, 2004.

C. Mcivor, M. Mcloone, and J. Mccanny, FPGA Montgomery multiplier architectures -a comparison, IEEE Symp. Field-Programmable Custom Computing Machines (FCCM), p.54, 2004.

M. Mcloone, C. Mcivor, and J. Mccanny, Coarsely integrated operand scanning (CIOS) architecture for high-speed Montgomery modular multiplication, IEEE Internat. Conf. on Field-Programmable Technology, p.54, 2004.

C. Mcivor, M. Mcloone, and J. Mccanny, High-radix systolic modular multiplication on reconfigurable hardware, IEEE Internat. Conf. on Field-Programmable Technology, p.58, 2005.

P. L. Montgomery, Modular multiplication without trial division, Math. of Comp, vol.44, issue.170, p.52, 1985.

P. L. Montgomery, Speeding the Pollar and elliptic curves methods of factorisation. Mathematics of Computation, vol.48, p.100, 1987.

S. Mangard, E. Oswald, and T. Popp, Power analysis attacks : Revealing the secrets of smart cards, vol.31, p.27, 2008.

M. Morales-sandoval and A. Diaz-perez, Scalable GF(p) Montgomery multiplier based on a digit-digit computation approach, IET Computers & Digital Techniques, vol.10, issue.3, p.78, 2016.

, NISTIR 8105 : Report on post-quantum cryptography, p.5, 2016.

S. Ors, L. Batina, B. Preneel, and J. Vandewalle, Hardware implementation of a Montgomery modular multiplier in a systolic array, Internat. Parallel and Distributed Processing Symp, p.58, 2003.

H. Orup, Simplifying quotient determination in high-radix modular multiplication, Symp. on Computer Arithmetic (ARITH), vol.54, p.129, 1995.

C. Petit and J. Quisquater, On polynomial systems arising from a Weil descent, Proc. 18th International Conference on the Theory and Application of Cryptology and Information Security (ASIACRYPT), vol.18, p.95, 2012.

J. Pelzl, T. Wollinger, and C. Paar, High performance arithmetic for special hyperelliptic curve cryptosystems of genus two, Proc. International Conference on Information Technology : Coding and Computing (ITCC), vol.2, p.96, 2004.

D. B. Roy, D. Mukhopadhyay, M. Izumi, and J. Takahashi, Tile before multiplication : An efficient strategy to optimize DSP multiplier for accelerating prime field ECC for NIST curves, Proc. 51st Annual Design Automation Conference (DAC), p.63, 2014.