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, La conception est réalisée selon les étapes suivantes

, Création du réseau de polarisation pour les accès de polarisation de grille et de drain au plus près du transistor (limitation des risques d'oscillation)

, Modélisation de l'effet de la longueur des fils (wire bonding) de microcâblage utilisés pour relier les accès du transistor avec le circuit

, IMN : Input Matching Network) pour l'obtention du gain en puissance maximum du transistor ; impédance conjuguée ramenée par la charge d'entrée 50 ? et l'IMN

, OMN : Output Matching Network) pour optimiser le transfert de puissance vers la charge de sortie 50? ; impédance conjuguée ramenée par la charge de sortie et l'OMN

, Vérification des performances avec les autres transistors et ajustement des réseaux si nécessaire

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