, bool array Expected[proc,proc] : bool array Delayed

=. Trying and &. State, Trying && Priority

=. Trying and &. Request,

=. Trying,

. Netperm'j!true,

, = False }

=. In, &. Netreq'j?-=-true, and }. Delayed,

=. Out and &. Netreq'j?-=-true-}-{-request,

. Netperm'j!true,

, = False }

=. Trying, &. Netreq'j?-=-true, and &. Priority,

=. Trying, &. Netreq'j?-=-true, and &. Priority,

. Netreq'j!true,

, = False }

, A formal specification of Intel Itanium processor family memory ordering. Intel, 2002.

, Programming Languages and Systems-24th European Symposium on Programming, ESOP 2015, Held as Part of the European Joint Conferences on Theory and Practice of Software, pp.308-332, 2015.

A. Parosh, G. Abdulla, A. Delzanno, and . Rezine, « Parameterized Verification of Infinite-State Processes with Global Conditions, Computer Aided Verification, 19th International Conference, pp.145-157, 2007.

P. Abdulla and B. Jonsson, Proceedings of the Eighth Annual Symposium on Logic in Computer Science (LICS '93), pp.160-170, 1993.

A. Parosh and . Abdulla, « A Load-Buffer Semantics for Total Store Ordering, Logical Methods in Computer Science, vol.14, issue.1, 2018.

A. Parosh and . Abdulla, Automatic Fence Insertion in Integer Programs via Predicate Abstraction, Static Analysis-19th International Symposium, vol.2012, pp.164-180, 2012.

A. Parosh and . Abdulla, Context-Bounded Analysis for POWER, Tools and Algorithms for the Construction and Analysis of Systems-23rd International Conference, TACAS 2017, Held as Part of the European Joint Conferences on Theory and Practice of Software, pp.56-74, 2017.

A. Parosh and . Abdulla, Counter-Example Guided Fence Insertion under TSO, Tools and Algorithms for the Construction and Analysis of Systems18th International Conference, TACAS 2012, Held as Part of the European Joint Conferences on Theory and Practice of Software, vol.2012, pp.204-219, 2012.

A. Parosh and . Abdulla, General Decidability Theorems for Infinite-State Systems, Proceedings, 11th Annual IEEE Symposium on Logic in Computer Science, pp.313-321, 1996.

A. Parosh and . Abdulla, Sound Tool for Automatic Fence Insertion under TSO, Tools and Algorithms for the Construction and Analysis of Systems-19th International Conference, TACAS 2013, Held as Part of the European Joint Conferences on Theory and Practice of Software, pp.530-536, 2013.

A. Parosh and . Abdulla, Precise and Sound Automatic Fence Insertion Procedure under PSO, Networked Systems-Third International Conference, NETYS 2015, pp.32-47, 2015.

A. Parosh and . Abdulla, Tools and Algorithms for the Construction and Analysis of Systems-21st International Conference, TACAS 2015, Held as Part of the European Joint Conferences on Theory and Practice of Software, pp.353-367, 2015.

A. Parosh and . Abdulla, The Benefits of Duality in Verifying Concurrent Programs under TSO, 27th International Conference on Concurrency Theory, vol.5, p.15, 2016.

A. Adir, H. Attiya, and G. Shurek, Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture, IEEE Trans. Parallel Distrib. Syst, vol.14, pp.502-515, 2003.

V. Sarita, K. Adve, and . Gharachorloo, Shared Memory Consistency Models : A Tutorial, vol.29, pp.66-76, 1996.

V. Sarita, . Adve, D. Mark, and . Hill, « Weak Ordering-A New Definition, Proceedings of the 17th Annual International Symposium on Computer Architecture, pp.2-14, 1990.

M. Ahamad, Causal Memory : Definitions, Implementation, and Programming, vol.9, pp.37-49, 1995.

M. Ahamad, The Power of Processor Consistency, SPAA, pp.251-260, 1993.

F. Alberti, Automated Support for the Design and Validation of Fault Tolerant Parameterized Systems : a case study, p.35, 2010.

, A Shared Memory Poetics, 2010.

, Simulation and Invariance for Weak Consistency, Static Analysis-23rd International Symposium, pp.3-22, 2016.

J. Alglave and P. Cousot, Ogre and Pythia : an invariance proof method for weak consistency models, Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages, pp.3-18, 2017.

J. Alglave, D. Kroening, and M. Tautschnig, « Partial Orders for Efficient Bounded Model Checking of Concurrent Software, Computer Aided Verification-25th International Conference, CAV 2013, pp.141-157, 2013.

J. Maranget, Computer Aided Verification-23rd International Conference, pp.50-66, 2011.

J. Alglave, L. Maranget, and M. Tautschnig, « Herding Cats : Modelling, Simulation, Testing, and Data Mining for Weak Memory, ACM Trans. Program. Lang. Syst, vol.36, issue.2, pp.1-7, 2014.

J. Alglave, « Don't Sit on the Fence-A Static Analysis Approach to Automatic Fence Insertion, Computer Aided Verification-26th International Conference, CAV 2014, Held as Part of the Vienna Summer of Logic, pp.508-524, 2014.

J. Alglave, « Don't Sit on the Fence : A Static Analysis Approach to Automatic Fence Insertion, ACM Trans. Program. Lang. Syst, vol.39, p.38, 2017.

J. Alglave, « Fences in weak memory models (extended version), Formal Methods in System Design, vol.40, pp.170-205, 2012.

J. Alglave, Software Verification for Weak Memory via Program Transformation, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2013, pp.512-532, 2013.

J. Alglave, The semantics of power and ARM multiprocessor machine code, Proceedings of the POPL 2009 Workshop on Declarative Aspects of Multicore Programming, pp.13-24, 2009.

R. Krzysztof, . Apt, and . Dexter-kozen, « Limits for Automatic Verification of FiniteState Concurrent Systems, Inf. Process. Lett, vol.22, pp.307-309, 1986.

M. F. Atig, A. Bouajjani, and G. Parlato, « ContextBounded Analysis of TSO Systems, From Programs to Systems. The Systems perspective in Computing-ETAPS Workshop, pp.21-38, 2014.

M. F. Atig, A. Bouajjani, and G. Parlato, « Getting Rid of Store-Buffers in TSO Analysis, Computer Aided Verification-23rd International Conference, pp.99-115, 2011.

M. Faouzi-atig, On the verification problem for weak memory models, Proceedings of the 37th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, POPL 2010, pp.7-18, 2010.

M. Faouzi-atig, What's Decidable about Weak Memory Models ?, In : Programming Languages and Systems-21st European Symposium on Programming, ESOP 2012, Held as Part of the European Joint Conferences on Theory and Practice of Software, vol.2012, pp.26-46, 2012.

H. Attiya and R. Friedman, « Programming DEC-Alpha Based Multiprocessors the Easy Way (Extended Abstract) ». In : SPAA, pp.157-166, 1994.

C. J. Banks, Verification of a lazy cache coherence protocol against a weak memory model, Formal Methods in Computer Aided Design, pp.60-67, 2017.

M. Batty, M. Dodds, and A. Gotsman, « Library abstraction for C/C++ concurrency, The 40th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, POPL '13, pp.235-248, 2013.

M. Batty, Clarifying and compiling C/C++ concurrency : from C++11 to POWER, Proceedings of the 39th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.509-520, 2012.

M. Batty, Proceedings of the 38th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.55-66, 2011.

G. Bernardi and A. Gotsman, Robustness against Consistency Models with Atomic Visibility, vol.7, pp.1-7, 2016.

. Jasmin-christian-blanchette, Proceedings of the 13th International ACM SIGPLAN Conference on Principles and Practice of Declarative Programming, pp.113-124, 2011.

H. Boehm and S. V. Adve, « Foundations of the C++ concurrency memory model, Proceedings of the ACM SIGPLAN 2008 Conference on Programming Language Design and Implementation, pp.68-78, 2008.

A. Bouajjani, E. Derevenetc, and R. Meyer, « Checking and Enforcing Robustness against TSO, Programming Languages and Systems-22nd

, Held as Part of the European Joint Conferences on Theory and Practice of Software, ETAPS 2013, pp.533-553, 2013.

A. Bouajjani, E. Derevenetc, and R. Meyer, Fachtagung des GIFachbereichs Softwaretechnik, 25. Februar-28. Februar, Robustness against Relaxed Memory Models, pp.85-86, 2014.

A. Bouajjani, R. Meyer, and . Eike-möhlmann, « Deciding Robustness against Total Store Ordering, Automata, Languages and Programming-38th International Colloquium, ICALP 2011, pp.428-440, 2011.

A. Bouajjani, Fundamental Approaches to Software Engineering-18th International Conference, FASE 2015, Held as Part of the European Joint Conferences on Theory and Practice of Software, pp.267-282, 2015.

G. Boudol and G. Petri, « Relaxed memory models : an operational approach, Proceedings of the 36th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.392-403, 2009.

S. Burckhardt, R. Alur, M. K. Milo, and . Martin, « Bounded Model Checking of Concurrent Data Types on Relaxed Memory Models : A Case Study, Computer Aided Verification, 18th International Conference, CAV 2006, Seattle, pp.489-502, 2006.

S. Burckhardt, R. Alur, M. K. Milo, and . Martin, « CheckFence : checking consistency of concurrent data types on relaxed memory models, Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, pp.12-21, 2007.

S. Burckhardt and . Musuvathi, Effective Program Verification for Relaxed Memory Models, Computer Aided Verification, 20th International Conference, pp.107-120, 2008.

S. Burckhardt, M. Musuvathi, and V. Singh, « Verifying Local Transformations on Relaxed Memory Models, Compiler Construction, 19th International Conference, CC 2010, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2010, pp.104-123, 2010.

S. Burckhardt, Held as Part of the European Joint Conferences on Theory and Practice of Software, vol.2012, pp.87-107, 2012.

J. Burnim, K. Sen, and C. Stergiou, Sound and Complete Monitoring of Sequential Consistency for Relaxed Memory Models, Tools and Algorithms for the Construction and Analysis of Systems-17th International Conference, TACAS 2011, Held as Part of the Joint European Conferences on Theory and Practice of Software, pp.11-25, 2011.

P. Cenciarelli, A. Knapp, and E. Sibilio, The Java Memory Model : Operationally, Denotationally, Axiomatically ». In : Programming Languages and Systems, 16th European Symposium on Programming, pp.331-346, 2007.

P. Chatterjee and . Ganesh-gopalakrishnan, Towards A formal Model of Shared Memory Consistency for Intel Itanium TM, pp.515-518, 2001.

F. Chevrou, Aurélie Hurault et Philippe Quéinnec. « On the diversity of asynchronous communication, vol.28, pp.847-879, 2016.

N. Chong-et-samin and . Ishtiaq, Proceedings of the 2008 ACM SIGPLAN workshop on Memory Systems Performance and Correctness : held in conjunction with the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '08), pp.16-19, 2008.

E. M. Clarke, O. Grumberg, C. Michael, and . Browne, « Reasoning About Networks With Many Identical Finite-State Processes, Proceedings of the Fifth Annual ACM Symposium on Principles of Distributed Computing, pp.240-248, 1986.

D. Sylvain-conchon, F. Declerck, and . Zaïdi, « Compiling Parameterized X86-TSO Concurrent Programs to Cubicle-W, Formal Methods and Software Engineering-19th International Conference on Formal Engineering Methods, ICFEM 2017, pp.88-104, 2017.

D. Sylvain-conchon, F. Declerck, and . Zaïdi, System Descriptions-9th International Joint Conference, IJCAR 2018, 2018.

A. Sylvain-conchon, F. Mebsout, and . Zaïdi, « Certificates for Parameterized Model Checking, FM 2015 : Formal Methods-20th International Symposium, pp.126-142, 2015.

. Sylvain-conchon, Alain Mebsout et Fatiha Zaïdi. « Vérification de systèmes paramétrés avec Cubicle, JFLA, 2013.

. Sylvain-conchon, A Parallel SMT-Based Model Checker for Parameterized Systems-Tool Paper, Computer Aided Verification-24th International Conference, CAV 2012, pp.718-724, 2012.

. Sylvain-conchon, Invariants for finite instances and beyond », In : Formal Methods in Computer-Aided Design, pp.61-68, 2013.

A. Marian-dan, Effective Abstractions for Verification under Relaxed Memory Models, Verification, Model Checking, and Abstract Interpretation-16th International Conference, pp.449-466, 2015.

E. Derevenetc, Robustness against Relaxed Memory Models, 2015.

E. Derevenetc and R. Meyer, Robustness against Power is PSpacecomplete ». In : Automata, Languages, and Programming-41st International Colloquium, ICALP, pp.158-170, 2014.
DOI : 10.1007/978-3-662-43951-7_14

URL : http://arxiv.org/pdf/1404.7092

J. Derrick, A Proof Method for Linearizability on TSO Architectures, Provably Correct Systems, pp.61-91, 2017.

M. Dubois, C. Scheurich, and F. A. Briggs, « Memory Access Buffering in Multiprocessors, Proceedings of the 13th Annual Symposium on Computer Architecture, pp.434-442, 1986.

J. M. Stone, F. Corella, and C. M. Barton, A formal specification of the PowerPC shared memory architecture, 1993.

X. Fang, J. Lee, P. Samuel, and . Midkiff, Automatic fence insertion for shared memory multiprocessing, Proceedings of the 17th Annual International Conference on Supercomputing, pp.285-294, 2003.
DOI : 10.1145/782852.782854

S. Flur, Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages, 2017.

S. Flur, Proceedings of the 43rd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.608-621, 2016.

F. Furbach, 14th International Conference on Application of Concurrency to System Design, pp.92-101, 2014.

M. Steven, A. P. German, and . Sistla, « Reasoning about Systems with Many Processes, J. ACM, vol.39, pp.675-735, 1992.

K. Gharachorloo, Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors, Proceedings of the 17th Annual International Symposium on Computer Architecture, pp.15-26, 1990.

S. Ghilardi and . Silvio-ranise, Automated Reasoning, 5th International Joint Conference, IJCAR 2010, Edinburgh, pp.22-29, 2010.

S. Ghilardi, Towards SMT Model Checking of Array-Based Systems, Automated Reasoning, 4th International Joint Conference, IJCAR 2008, pp.67-82, 2008.
URL : https://hal.archives-ouvertes.fr/inria-00576600

H. J. Goeman, « The arbiter : an active system component for implementing synchronizing primitives, Fundam. Inform, 1981.

J. R. Goodman, Cache consistency and sequential consistency. Rapp. tech, 1989.

G. Gopalakrishnan, Y. Yang, and H. Sivaraj, « QB or Not QB : An Efficient Execution Verification Tool for Memory Orderings, Computer Aided Verification, 16th International Conference, pp.401-413, 2004.

A. Gotsman and S. Burckhardt, « Consistency Models with Global Operation Sequencing and their Composition, 31st International Symposium on Distributed Computing, vol.23, p.16, 2017.

A. Gotsman, M. Musuvathi, and H. Yang, « Show No Weakness : Sequentially Consistent Specifications of TSO Libraries, Distributed Computing-26th International Symposium, DISC 2012, pp.31-45, 2012.

K. E. Gray, « An integrated concurrency and core-ISA architectural envelope definition, and test oracle, for IBM POWER multiprocessors, Proceedings of the 48th International Symposium on Microarchitecture, pp.635-646, 2015.

M. Herlihy and N. Shavit, The art of multiprocessor programming, 2008.

L. Higham, L. Jackson, and . Kawash, Distributed Computing and Networking, 8th International Conference, pp.58-69, 2006.

M. D. Hill, « Multiprocessors Should Support Simple Memory-Consistency Models, IEEE Computer, vol.31, pp.28-34, 1998.

A. Horn and D. Kroening, Formal Techniques for Distributed Objects, Components, and Systems-35th IFIP WG 6.1 International Conference, FORTE 2015, Held as Part of the 10th International Federated Conference on Distributed Computing Techniques, pp.19-34, 2015.

W. Phillip, M. Hutto, and . Ahamad, « Slow Memory : Weakening Consistency to Enhance Concurrency in Distributed Shared Memories, 10th International Conference on Distributed Computing Systems (ICDCS 1990), pp.302-309, 1990.

A. Thuan-quang-huynh and . Roychoudhury, FM 2006 : Formal Methods, 14th International Symposium on Formal Methods, pp.476-491, 2006.

, IEEE et The Open Group. POSIX Standard. IEEE Std, 1003.

, Intel 64 and IA-32 Architectures SDM. Intel Corporation. Déc, 2016.

I. Standard, , vol.14882, 2011.

I. Standard, , vol.9899, 2011.

H. Jin, T. Yavuz-kahveci, A. Beverly, and . Sanders, Tools and Algorithms for the Construction and Analysis of Systems-18th International Conference, TACAS 2012, Held as Part of the European Joint Conferences on Theory and Practice of Software, pp.220-236, 2012.

M. Kokologiannakis, Effective stateless model checking for C/C++ concurrency, vol.17, p.32, 2018.

M. Kuperstein, M. T. Vechev, and E. Yahav, Automatic inference of memory fences, Proceedings of 10th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2010, pp.111-119, 2010.

M. Kuperstein, M. T. Vechev, and E. Yahav, « Partial-coherence abstractions for relaxed memory models, Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, pp.187-198, 2011.

L. Lamport, « How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs, IEEE Trans. Computers, vol.28, pp.690-691, 1979.

J. Lee, A. David, and . Padua, « Hiding Relaxed Memory Consistency with Compilers, Proceedings of the 2000 International Conference on Parallel Architectures and Compilation Techniques (PACT'00), pp.111-122, 2000.

A. Linden and P. Wolper, « A Verification-Based Approach to Memory Fence Insertion in PSO Memory Systems, Tools and Algorithms for the Construction and Analysis of Systems-19th International Conference, TACAS 2013, Held as Part of the European Joint Conferences on Theory and Practice of Software, pp.339-353, 2013.

A. Linden and P. Wolper, « A Verification-Based Approach to Memory Fence Insertion in Relaxed Memory Systems, Model Checking Software-18th International SPIN Workshop, pp.144-160, 2011.

A. Linden and P. Wolper, « An Automata-Based Symbolic Approach for Verifying Programs on Relaxed Memory Models, Model Checking Software-17th International SPIN Workshop, pp.212-226, 2010.

J. Richard, J. Lipton, and . Sandberg, PRAM : A Scalable Shared Memory, 1988.

F. Liu, Dynamic synthesis for relaxed memory models, ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI '12, pp.429-440, 2012.

S. Mador-haim, An Axiomatic Memory Model for POWER Multiprocessors, Computer Aided Verification-24th International Conference, CAV 2012, pp.495-512, 2012.
URL : https://hal.archives-ouvertes.fr/hal-01100773

J. Manson, W. Pugh, V. Sarita, and . Adve, The Java memory model, Proceedings of the 32nd ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.378-391, 2005.

A. Mebsout, « Inférence d'invariants pour le model checking de systèmes paramétrés. (Invariants inference for model checking of parameterized systems), 2014.

R. Morisset, . Francesco-zappa, and . Nardelli, « Partially redundant fence elimination for x86, ARM, and power processors, Proceedings of the 26th International Conference on Compiler Construction, pp.1-10, 2017.

M. Musuvathi and S. Qadeer, « Iterative context bounding for systematic testing of multithreaded programs, Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, pp.446-455, 2007.

K. Nienhuis, K. Memarian, and P. Sewell, « An operational semantics for C/C++11 concurrency, Proceedings of the 2016 ACM SIGPLAN International Conference on Object-Oriented Programming, Systems, Languages, and Applications, OOPSLA 2016, pp.111-128, 2016.

S. Owens, « Reasoning about the Implementation of Concurrency Abstractions on x86-TSO, ECOOP 2010-Object-Oriented Programming, 24th European Conference, pp.478-503, 2010.

S. Owens, S. Sarkar, and P. Sewell, Theorem Proving in Higher Order Logics, 22nd International Conference, pp.391-407, 2009.

S. Park, L. David, and . Dill, « An Executable Specification, Analyzer and Verifier for RMO (Relaxed Memory Order) ». In : SPAA, pp.34-41, 1995.

. Pmcx86,

C. Pulte, Simplifying ARM concurrency : multicopy-atomic axiomatic and operational models for ARMv8, vol.19, p.29, 2018.

S. Sarkar, ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI '12, pp.311-322, 2012.

S. Sarkar, The semantics of x86-CC multiprocessor machine code, Proceedings of the 36th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.379-391, 2009.

S. Sarkar, Understanding POWER multiprocessors, Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2011, pp.175-186, 2011.
DOI : 10.1145/1993498.1993520

URL : https://hal.archives-ouvertes.fr/hal-01100824

P. Schnoebelen, « Verifying lossy channel systems has nonprimitive recursive complexity, Inf. Process. Lett, vol.83, pp.251-261, 2002.
DOI : 10.1016/s0020-0190(01)00337-4

URL : http://www.lsv.ens-cachan.fr/Publis/PAPERS/PDF/Sch-IPL2002.pdf

J. Sevcík, A Verified Compiler for Relaxed-Memory Concurrency, J. ACM, vol.60, p.50, 2013.

J. Sevcík, Relaxed-memory concurrency and verified compilation, Proceedings of the 38th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.43-54, 2011.

P. Sewell, « x86-TSO : a rigorous and usable programmer's model for x86 multiprocessors, Commun. ACM, vol.53, pp.89-97, 2010.

D. E. Shasha and M. Snir, « Efficient and Correct Execution of Parallel Programs that Share Memory, ACM Trans. Program. Lang. Syst, vol.10, pp.282-312, 1988.
DOI : 10.1145/42190.42277

Z. Sura, Compiler techniques for high performance sequentially consistent java programs, Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2005, pp.2-13, 2005.
DOI : 10.1145/1065944.1065947

E. Tomasco, Lazy sequentialization for TSO and PSO via shared memory abstractions, Formal Methods in Computer-Aided Design, pp.193-200, 2016.
DOI : 10.1109/fmcad.2016.7886679

URL : https://eprints.soton.ac.uk/397759/1/tsopso.pdf

E. Tomasco, Using Shared Memory Abstractions to Design Eager Sequentializations for Weak Memory Models, Software Engineering and Formal Methods-15th International Conference, pp.185-202, 2017.
DOI : 10.1007/978-3-319-66197-1_12

O. Travkin and H. Wehrheim, Theoretical Aspects of Computing-ICTAC 2016-13th International Colloquium, pp.3-24, 2016.

V. Vafeiadis, « Formal Reasoning about the C11 Weak Memory Model, Proceedings of the 2015 Conference on Certified Programs and Proofs, pp.1-2, 2015.
DOI : 10.1145/2676724.2693181

V. Vafeiadis, « Program Verification Under Weak Memory Consistency Using Separation Logic, Computer Aided Verification-29th International Conference, pp.30-46, 2017.
DOI : 10.1007/978-3-319-63387-9_2

V. Vafeiadis and C. Narayan, Relaxed separation logic : a program logic for C11 concurrency, Proceedings of the 2013 ACM SIGPLAN International Conference on Object Oriented Programming Systems Languages & Applications, OOPSLA 2013, part of SPLASH 2013, pp.867-884, 2013.
DOI : 10.1145/2544173.2509532

V. Vafeiadis, . Francesco-zappa, and . Nardelli, « Verifying Fence Elimination Optimisations, Static Analysis-18th International Symposium, pp.146-162, 2011.
DOI : 10.1007/978-3-642-23702-7_14

URL : http://www.mpi-sws.org/%7Eviktor/papers/sas2011-fenceelim.pdf

V. Vafeiadis, « Common Compiler Optimisations are Invalid in the C11 Memory Model and what we can do about it, Proceedings of the 42nd Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, pp.209-220, 2015.

J. Wickerson, Automatically comparing memory consistency models, Proceedings of the 44th ACM SIGPLAN Symposium on Principles of Programming Languages, pp.190-204, 2017.
DOI : 10.1145/3009837.3009838

URL : http://johnwickerson.github.io/papers/memalloy.pdf

Y. Yang, G. Gopalakrishnan, and G. Lindstrom, « UMM : an operational memory model specification framework with integrated model checking capability, Concurrency-Practice and Experience, vol.17, pp.465-487, 2005.
DOI : 10.1002/cpe.837

Y. Yang, A Framework for Axiomatic and Executable Specifications of Memory Consistency Models, 18th International Parallel and Distributed Processing Symposium, 2004.