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, Liste de publications -Auteur principal ? A Novel Low Temperature (<500°C) and Low-k (3.8) Boron Nitride PECVD Offset Spacer Featuring 3D VLSI Integration

B. Samson, C. Prévitali, A. Arvet, N. Michallet, S. Rochat et al.,

M. Besson, N. Garcia-barros, F. Posseme, P. Pierre, D. Maury et al., International Conference on Solid State Devices and Materials, 2015, poster

, ? Influence of Low Thermal Budget Processing and Post-Processing on Performance and Reliability of HfO2/TiN Gate-First for 3D VLSI Integration

C. Fenouillet-beranger, X. Leroux, A. Garros, N. Toffoli, V. Rambal et al.,

B. Samson, N. Previtali, G. Bernier, V. Audoit, L. Delaye et al.,

. Vinet, IEEE Semiconductor Interface Specialists Conference, 2015.

C. V. Lu, C. Fenouillet-beranger, C. Bout, A. Roule, V. Beugin et al., International Conference on Solid State Devices and Materials, 2016, poster

C. V. Lu, C. Fenouillet-béranger, R. Gassilloud, H. Graoui, D. Larmagnac et al.,

M. Rambal, B. Samson, C. Previtali, N. Guedj, S. Bernier et al.,

M. Skotnicki and . Vinet, International Conference on Solid State Devices and Materials, 2016, poster

, ? Integration of Low Temperature SiGe:B Raised Sources and Drains in p-type FDSOI Field Effect Transistors

M. Benevent, B. Samson, C. Prévitali, M. Tabone, F. Cassé et al.,

T. Batude, M. Skotnicki, and . Vinet, ECS Transactions, vol.75, issue.8, pp.51-58, 2016.

, ? Dense N over CMOS 6T SRAM Cells using 3D Sequential Integration

M. Fenouillet-beranger, O. Brocard, G. Billoint, L. Cibrario, X. Brunet et al.,

A. Casse, A. Laurent, G. Toffoli, R. Romano, R. Kies et al.,

C. Samson, C. Tallaron, B. Tabone, D. Previtali, A. Barge et al.,

P. Andrieu, T. Batude, M. Skotnicki, and . Vinet, International Symposium on VLSI Technology, Systems and Applications, 2017.

C. V. Lu, F. Deprat, C. Fenouillet-beranger, and P. , ? Key process steps for high performance and reliable 3D Sequential Integration

D. Nouguier, X. Ney, P. Federspiel, A. Besombes, G. Toffoli et al.,

M. Barge, B. Samson, C. Previtali, L. Tabone, L. Pasini et al., IEEE Symposium on VLSI Technology, 2017, présentation orale. -Co-auteur ? New insights on bottom layer thermal stability and laser annealing promises for high performance

G. Aussenac, P. Druais, E. Perreau, S. Richard, E. Chhun et al.,

L. Pasini, V. Brunet, C. Lu, M. Reita, and . Vinet, IEEE International Electron Devices Meeting, 2014.

, ? Monolithic 3D Integration: a powerful alternative to classical 2D Scaling

C. Batude, F. Fenouillet-beranger, L. Clermidy, O. Brunet, . Rozeau et al.,

F. Samson, V. Deprat, L. Lu, S. Pasini, H. Thuries et al., , 2014.

P. Batude, C. Fenouillet-beranger, L. Pasini, V. Lu, F. Deprat et al., ? 3DVLSI with CoolCube process: An alternative path to scaling

O. Mathieu, G. Billoint, O. Cibrario, H. Turkyilmaz, S. Sarhan et al.,

L. Widiez, C. Hortemel, M. Tabone, B. Samson, N. Previtali et al.,

F. Seignard, L. Fournel, P. Benaissa, P. Coudrain, J. Leduc et al.,

O. Clermidy, M. Faynot, and . Vinet, IEEE Symposium on VLSI Technology, 2015.

, ? Recent advances In 3D VLSI integration

C. V. Mazzocchi, F. Lu, J. Deprat, M. Micout, B. Samson et al., International Conference on IC Design and Technology, 2016.

A. Stacks, X. Tsiara, C. V. Garros, C. Lu, and . Fenouillet-beranger, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena, p.2017

C. Fenouillet-beranger, P. Batude, L. Brunet, V. Mazzocchi, C. V. Lu et al., ? Recent advances in low temperature process In view of 3D VLSI integration

P. Previtali, N. Besombes, V. Rambal, F. Lapras, O. Andrieu et al.,

P. Cibrario, B. Acosta-alba, S. Mathieu, F. Kerdilès, C. Nemouchi et al.,

X. Gassilloud, C. Garros, V. Leroux, C. Beugin, D. Guerin et al.,

I. Vinet and . Soi, , 2016.

L. Brunet, P. Batude, C. Fenouillet-beranger, P. Besombes, L. Hortemel et al., ? First demonstration of a CMOS over CMOS 3D VLSI CoolCube TM integration on 300mm wafers

L. Fournel, T. Benaissa, P. Signamarcheix, M. Besson, R. Jourdan et al.,

C. Hartmann, N. Comboroure, N. Allouti, C. Posseme, and C. Vizioz,

L. Baud, C. V. Pasini, F. Lu, A. Deprat, G. Toffoli et al., IEEE Symposium on VLSI Technology, 2016.

, ? Opportunities brought by sequential 3D CoolCube? integration

L. Fenouillet-beranger, V. Brunet, C. V. Mazzocchi, F. Lu, and J. Deprat,

N. Besombes, F. Rambal, O. Andrieu, M. Billoint, S. Brocard et al., European Solid-State Device Research Conference, 2016.

, ? First SOI Tunnel FETs with Low-Temperature Process

P. Lu, C. Batude, S. Fenouillet-beranger, F. Martinie, S. Allain et al.,

. Vinet, Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, 2017.

, ? Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells

J. Mathieu, C. Colonna, C. Lopes-dos-santos, C. V. Fenouillet-beranger, G. Lu et al.,

P. Brunet, F. Batude, S. Andrieu, O. Thuries, and . Billoint, IEEE Computer Society Annual Symposium on VLSI, 2017.