]. R. Gallager, Low-density parity-check codes, IEEE Transactions on Information Theory, vol.8, issue.1, 1963.
DOI : 10.1109/TIT.1962.1057683

Y. Kou, S. Lin, and M. P. Fossorier, Low-density parity-check codes based on nite geometries: a rediscovery and new results, IEEE Transactions on Information Theory, vol.47, issue.7, p.27112736, 2001.

J. Zhang and M. P. Fossorier, A modied weighted bit-ipping decoding of low-density parity-check codes, IEEE Communications Letters, vol.8, issue.3, p.165167, 2004.

N. Miladinovic and M. Fossorier, A improved bit-ipping decoding of lowdensity parity-check codes, IEEE Transactions on Information Theory, vol.51, issue.4, p.15941606, 2005.

M. Jiang, C. Zhao, Z. Shi, and Y. Chen, An improvement on the modied weighted bit ipping decoding algorithm for ldpc codes, IEEE Communications Letters, vol.9, issue.9, p.814816, 2005.

X. Wu, C. Zhao, and X. You, Parallel weighted bit-ipping decoding, IEEE Communications Letters, vol.11, issue.8, p.671673, 2007.
DOI : 10.1109/lcomm.2007.070269

G. Li and G. Feng, Improved parallel weighted bit-ipping decoding algorithm for ldpc codes, IET Communications, vol.3, issue.1, p.9199, 2009.
DOI : 10.1049/iet-com:20070632

T. Wadayama, K. Nakamura, M. Yagita, Y. Funahashi, S. Usami et al., Gradient descent bit ipping algorithms for decoding ldpc codes, IEEE Transactions on Communications, vol.58, issue.6, p.16101614, 2010.
DOI : 10.1109/isita.2008.4895387

URL : http://arxiv.org/pdf/0711.0261v2.pdf

R. Haga and S. Usami, Multi-bit ip type gradient descent bit ipping decoding using no thresholds, 2012 International Symposium on Information Theory and its Applications, p.610, 2012.

T. Phromsa-ard, J. Arpornsiripat, J. Wetcharungsri, P. Sangwongngam, K. Sripimanwat et al., Improved gradient descent bit ipping algorithms for ldpc decoding, Digital Information and Communication Technology and it's Applications (DICTAP), 2012 Second International Conference on, p.324328, 2012.

M. Ismail, I. Ahmed, and J. Coon, Low Power Decoding of LDPC Codes, ISRN Sensor Networks, 2013.
DOI : 10.1109/JSSC.2005.864133

Q. Zhu and L. N. Wu, Weighted candidate bit based bit-ipping decoding algorithms for ldpc codes, 2013 3rd International Conference on Consumer Electronics, Communications and Networks, p.731734, 2013.
DOI : 10.1109/cecnet.2013.6703435

D. V. Nguyen and B. Vasic, Two-bit bit ipping algorithms for ldpc codes and collective error correction, IEEE Transactions on Communications, vol.62, issue.4, p.11531163, 2014.
DOI : 10.1109/tcomm.2014.021614.130884

G. Sundararajan, C. Winstead, and E. Boutillon, Noisy gradient descent bitip decoding for ldpc codes, IEEE Transactions on Communications, vol.62, issue.10, p.33853400, 2014.
DOI : 10.1109/tcomm.2014.2356458

URL : http://arxiv.org/pdf/1402.2773

O. A. Rasheed, P. Ivanis, and B. Vasi¢, Fault-tolerant probabilistic gradientdescent bit ipping decoder, IEEE Communications Letters, vol.18, issue.9, p.14871490, 2014.
DOI : 10.1109/lcomm.2014.2344031

H. Huang, Y. Wang, and G. Wei, Mixed modied weighted bit-ipping decoding of low-density parity-check codes, IET Communications, vol.9, issue.2, p.283290, 2015.

Y. H. Liu, X. Niu, and M. L. Zhang, Multi-threshold bit ipping algorithm for decoding structured ldpc codes, IEEE Communications Letters, vol.19, issue.2, p.127130, 2015.
DOI : 10.1109/lcomm.2014.2373352

T. C. Chang and Y. T. Su, Dynamic weighted bit-ipping decoding algorithms for ldpc codes, IEEE Transactions on Communications, vol.63, issue.11, p.39503963, 2015.
DOI : 10.1109/tcomm.2015.2469780

URL : http://arxiv.org/pdf/1501.02428

S. Imani, R. Shahbazian, and S. A. Ghorashi, An iterative bit ipping based decoding algorithm for ldpc codes, 2015 Iran Workshop on Communication and Information Theory (IWCIT), p.13, 2015.
DOI : 10.1109/iwcit.2015.7140214

K. Ma, J. Jin, W. Li, and P. Zhang, Two-staged weighted bit ipping (wbf ) decoding algorithm for ldpc codes, 2015 IEEE 9th International Conference on Anti-counterfeiting, Security, and Identication (ASID), pp.141-144, 2015.
DOI : 10.1109/icasid.2015.7405679

H. Li, H. Ding, and L. Zheng, Hybrid iterative decoding for ldpc codes based on gradient descent bit-ipping algorithm, 2016 8th International Conference on Wireless Communications Signal Processing (WCSP), p.13, 2016.
DOI : 10.1109/wcsp.2016.7752445

J. Jung and I. C. Park, Multi-bit ipping decoding of ldpc codes for nand storage systems, IEEE Communications Letters, vol.PP, issue.99 11, 2017.

D. Declercq, B. Vasic, S. K. Planjery, and E. Li, Finite Alphabet Iterative Decoders???Part II: Towards Guaranteed Error Correction of LDPC Codes via Iterative Decoder Diversity, IEEE Transactions on Communications, vol.61, issue.10, p.40464057, 2013.
DOI : 10.1109/TCOMM.2013.090513.120444

T. T. Nguyen-ly, T. Gupta, M. Pezzin, V. Savin, D. Declercq et al., Flexible, cost-ecient, high-throughput architecture for layered ldpc decoders with fully-parallel processing units, 2016 Euromicro Conference on Digital System Design (DSD), p.230237, 2016.
DOI : 10.1109/dsd.2016.33

T. Brack, M. Alles, T. Lehnigk-emden, F. Kienle, N. Wehn et al., Low Complexity LDPC Code Decoders for Next Generation Standards, 2007 Design, Automation & Test in Europe Conference & Exhibition, p.16, 2007.
DOI : 10.1109/DATE.2007.364613

URL : http://cecs.uci.edu/~papers/date08/PAPERS/2007/DATE07/PDFFILES/03.2_1.PDF

J. Sha, Z. Wang, M. Gao, and L. Li, Multi-gb/s ldpc code design and implementation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, p.262268, 2009.

Q. Huang, J. Kang, L. Zhang, S. Lin, and K. , Two reliabilitybased iterative majority-logic decoding algorithms for ldpc codes, IEEE Transactions on Communications, vol.57, issue.12, p.35973606, 2009.
DOI : 10.1109/tcomm.2009.12.080493

K. Le, D. Declercq, F. Ghaari, C. Spagnol, E. Popovici et al., Ecient realization of probabilistic gradient descent bit ipping decoders, 2015 IEEE International Symposium on Circuits and Systems (ISCAS), p.14941497, 2015.

M. Tanner, D. Srkdhara, and T. Fuja, A class of group-structured ldpc codes, Proc. 5th Int. Symp, 2001.

T. J. Richardson, M. A. Shokrollahi, and R. L. Urbanke, Design of capacityapproaching irregular low-density parity-check codes, IEEE Transactions on Information Theory, vol.47, issue.2, p.619637, 2001.

N. Mobini, A. H. Banihashemi, and S. Hemati, A dierential binary messagepassing ldpc decoder, IEEE Transactions on Communications, vol.57, issue.9, p.25182523, 2009.
DOI : 10.1109/glocom.2007.300

K. Cushon, S. Hemati, C. Leroux, S. Mannor, and W. J. Gross, Highthroughput energy-ecient ldpc decoders using dierential binary message passing, IEEE Transactions on Signal Processing, vol.62, issue.3, p.619631, 2014.
DOI : 10.1109/tsp.2013.2293116

A. V. Aho, H. J. , and U. J. , The Design and Analysis of Computer Algorithms, 1974.

B. Vasiä‡, S. K. Chilappagari, D. V. Nguyen, and S. K. Planjery, Trapping set ontology, 47th Annual Allerton Conference on Communication, Control, and Computing (Allerton), p.17, 2009.

D. Declercq, E. Li, B. Vasi¢, and S. K. Planjery, Approaching maximum likelihood decoding of nite length ldpc codes via faid diversity, 2012 IEEE Information Theory Workshop, p.487491, 2012.

D. Declercq, L. Danjean, E. Li, S. K. Planjery, and B. Vasi¢, Finite alphabet iterative decoding (faid) of the, 2010 6th International Symposium on Turbo Codes Iterative Information Processing, p.1115, 2010.
URL : https://hal.archives-ouvertes.fr/hal-00520041

B. Vasi¢, P. Ivanis, and D. Declercq, Approaching maximum likelihood performance of ldpc codes by stochastic resonance in noisy iterative decoders, Information Theory and Applications Workshop, 2016.

T. Richardson, Error oors of ldpc codes, 41st Annual Allerton Conf on Communications Control and Computing, p.14261435, 2003.

A. K. Panda, P. Rajput, and B. Shukla, FPGA Implementation of 8, 16 and 32 Bit LFSR with Maximum Length Feedback Polynomial Using VHDL, 2012 International Conference on Communication Systems and Network Technologies, p.769773, 2012.
DOI : 10.1109/CSNT.2012.168

B. Yuce, H. F. Ugurdag, S. Goren, and G. Dundar, Fast and ecient circuit topologies fornding the maximum of n k-bit numbers, IEEE Transactions on Computers, vol.63, issue.8, p.18681881, 2014.

T. Nguyen-ly, K. Le, F. Ghaari, A. Amaricai, O. Boncalo et al., Fpga design of high throughput ldpc decoder based on imprecise oset min-sum decoding, 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS), p.14, 2015.

D. Declercq, C. Winstead, B. Vasic, F. Ghaari, P. Ivanis et al., Noise-aided gradient descent bit-ipping decoders approaching maximum likelihood decoding, 2016 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC), p.300304, 2016.
DOI : 10.1109/istc.2016.7593125