211 ? ; ?, p.247 ,
Domain theory, Handbook of Logic in Computer Science, pp.1-168, 1994. ,
Reactive modules. Formal Methods in System Design, pp.7-48, 1999. ,
DOI : 10.1109/lics.1996.561320
Domains and Lambda-Calculi, p.25, 0199. ,
DOI : 10.1017/CBO9780511983504
URL : https://hal.archives-ouvertes.fr/inria-00070008
Syntax and semantics of the clock constraint specification language (CCSL), 2009. ,
Compiling with Continuations, 2006. ,
DOI : 10.1017/CBO9780511609619
A Very Modal Model of a Modern, Major, General Type System, Symposium on Principles of Programming Languages (POPL'07, 2007. ,
URL : https://hal.archives-ouvertes.fr/hal-00150978
Lucid, a nonprocedural language with iteration, Communications of the ACM, vol.20, issue.7, pp.519-526, 1977. ,
Productive Coprogramming with Guarded Recursion, International Conference on Functional Programming, 2013. ,
DOI : 10.1145/2544174.2500597
Category Theory, 2006. ,
DOI : 10.1093/acprof:oso/9780198568612.001.0001
Synchronous Machines: a Traced Category URL https, 2012. ,
Code generation in the polyhedral model is easier than you think, Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 2004. PACT 2004., 2004. ,
DOI : 10.1109/PACT.2004.1342537
URL : https://hal.archives-ouvertes.fr/hal-00017260
Periodic schedules for Unitary Timed Weighted Event Graphs, Automatic Control IEEE Transactions on, vol.57, issue.5, pp.2012-259 ,
DOI : 10.1109/tac.2012.2191871
URL : https://hal.archives-ouvertes.fr/hal-00371028
Strongly Typed Term Representations in Coq, Journal of Automated Reasoning, vol.14, issue.1, pp.141-159, 2012. ,
DOI : 10.1007/s10817-011-9219-0
A denotational theory of synchronous reactive systems, Information and Computation, vol.99, issue.2, pp.192-230, 1992. ,
DOI : 10.1016/0890-5401(92)90030-J
URL : https://hal.archives-ouvertes.fr/hal-00549783
Compositionality in Dataflow Synchronous Languages: Specification and Distributed Code Generation, Information and Computation, vol.163, issue.1, pp.125-171, 2000. ,
DOI : 10.1006/inco.2000.9999
The esterel synchronous programming language: Design, semantics, implementation. Science of computer programming, pp.87-152, 1992. ,
DOI : 10.1016/0167-6423(92)90005-v
URL : https://hal.archives-ouvertes.fr/inria-00075711
Multiclock Esterel, IFIP Workshop on Correct Hardware Design and Verification Methods (CHARME'01), 2001. ,
DOI : 10.1007/3-540-44798-9_10
System level design and verification using a synchronous language, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486), 2003. ,
DOI : 10.1109/ICCAD.2003.159720
Circuit design and verication with Esterel v7 and Esterel Studio, 2007 IEEE International High Level Design Validation and Test Workshop, 2007. ,
DOI : 10.1109/HLDVT.2007.4392800
Clock-directed modular code generation for synchronous data-flow languages, ACM Symposium on Languages, Compilers and Tools for Embedded Systems (LCTES'08), pp.46-110, 2008. ,
DOI : 10.1145/1379023.1375674
Cycle-static dataflow, IEEE Transactions on Signal Processing, vol.44, issue.2, pp.397-408, 1996. ,
DOI : 10.1109/78.485935
First steps in synthetic guarded domain theory: step-indexing in the topos of trees, Logical Methods in Computer Science, vol.8, issue.4, pp.2012-107 ,
Guarded Dependent Type Theory with Coinductive Types, Foundations of Software Science and Computation Structures (FoSSaCS'16, 2016. ,
DOI : 10.1007/978-3-642-54833-8_9
URL : http://arxiv.org/abs/1601.01586
Lava: Hardware Design in Haskell, International Conference on Functional Programming (ICFP'98, 1998. ,
Analyse d'applications flot de données pour la compilation multiprocesseur, 2013. ,
Periodic schedules for Cyclo-Static Dataflow, The 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, pp.232-238, 2013. ,
DOI : 10.1109/ESTIMedia.2013.6704509
URL : https://hal.archives-ouvertes.fr/hal-00880646
Formal methods for scheduling of latency-insensitive designs, EURASIP journal on Embedded Systems, vol.2007, issue.1, pp.8-8, 2007. ,
URL : https://hal.archives-ouvertes.fr/hal-00784464
The SL Synchronous Language. Software Engineering, IEEE Transactions on, vol.22, issue.4, pp.256-266, 1996. ,
DOI : 10.1109/32.491649
URL : https://hal.archives-ouvertes.fr/inria-00074168
Performance optimization of elastic systems using buffer resizing and buffer insertion, 2008 IEEE/ACM International Conference on Computer-Aided Design, 2008. ,
DOI : 10.1109/ICCAD.2008.4681613
Implementing latency-insensitive dataflow blocks, 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE), 2015. ,
DOI : 10.1109/MEMCOD.2015.7340485
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.696.1516
Theory of Latency- Insensitive Design. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol.20, issue.9, pp.1059-1076, 2001. ,
A scheduling strategy for synchronous elastic designs, Fundamenta Informaticae, vol.108, issue.12, pp.1-21, 2011. ,
DOI : 10.1109/acsd.2009.12
URL : http://upcommons.upc.edu/bitstream/2117/20078/1/05291065.pdf
Clocks in dataflow languages, Theoretical Computer Science, vol.94, issue.1, pp.125-140, 1992. ,
DOI : 10.1016/0304-3975(92)90326-B
A functional model for describing and reasoning about time behaviour of computing systems, Acta Informatica, vol.11, issue.6, pp.595-627, 1986. ,
DOI : 10.1007/BF00263648
Synchronous Kahn Networks, International Conference on Functional Programming (ICFP'96, pp.13-221, 1996. ,
DOI : 10.1145/232627.232651
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.15.9168
A Co-iterative Characterization of Synchronous Stream Functions, Electronic Notes in Theoretical Computer Science, vol.11, pp.1-21, 1998. ,
DOI : 10.1016/S1571-0661(04)00050-7
Lustre: A declarative language for programming synchronous systems, Symposium on Principles of Programming Languages (POPL'87), p.13, 1987. ,
Scheduling data-flow graphs via retiming and unfolding. Transactions on Parallel and Distributed Systems, IEEE Transactions on, vol.8, issue.12, pp.1259-1267, 1997. ,
Type Theory Should Eat Itself, Electronic Notes in Theoretical Computer Science, vol.228, pp.21-36, 2009. ,
DOI : 10.1016/j.entcs.2008.12.114
URL : http://doi.org/10.1016/j.entcs.2008.12.114
N-synchronous Kahn networks: a relaxed model of synchrony for real-time systems, Symposium on Principles of Programming Languages (POPL'06), pp.14-48, 2006. ,
Abstraction of Clocks in Synchronous Data-Flow Systems, The Sixth Asian Symposium on Programming Languages and Systems, pp.225-236, 2008. ,
DOI : 10.1016/0167-6423(91)90001-E
URL : https://hal.archives-ouvertes.fr/hal-01257274
Programming parallelism with futures in lustre, Proceedings of the tenth ACM international conference on Embedded software, EMSOFT '12, 2012. ,
DOI : 10.1145/2380356.2380394
URL : https://hal.archives-ouvertes.fr/hal-00786682
Type-based Initialization Analysis of a Synchronous Data-flow Language, Synchronous Languages, Applications, and Programming, 2002. ,
DOI : 10.1016/S1571-0661(05)80441-4
Clocks as First Class Abstract Types, International Conference on Embedded Software (EMSOFT'03, 2003. ,
DOI : 10.1007/978-3-540-45212-6_10
A conservative extension of synchronous data-flow with state machines, Proceedings of the 5th ACM international conference on Embedded software , EMSOFT '05, 2005. ,
DOI : 10.1145/1086228.1086261
Mixing signals and modes in synchronous data-flow systems, Proceedings of the 6th ACM & IEEE International conference on Embedded software , EMSOFT '06, 2006. ,
DOI : 10.1145/1176887.1176899
Marked directed graphs, Journal of Computer and System Sciences, vol.5, issue.5, pp.511-523, 1971. ,
DOI : 10.1016/S0022-0000(71)80013-2
URL : http://doi.org/10.1016/s0022-0000(71)80013-2
Domain theoretic models of polymorphism, Information and Computation, vol.81, issue.2, pp.123-167, 1989. ,
DOI : 10.1016/0890-5401(89)90068-0
Self: Specification and design of synchronous elastic circuits In International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU'06), 2006. ,
An Introduction to High-Level Synthesis, IEEE Design & Test of Computers, vol.26, issue.4, pp.8-17, 2009. ,
DOI : 10.1109/MDT.2009.69
URL : https://hal.archives-ouvertes.fr/hal-00447325
Modular Causality in a Synchronous Stream Language, European Symposium on Programming (ESOP'01, p.13, 2001. ,
DOI : 10.1007/3-540-45309-1_16
Cédric Pasteur, Marc Pouzet, and Éric Rutten. The Heptagon synchronous language, pp.188-242, 2012. ,
Array-OL: Proposition d'un formalisme tableau pour le traitement de signal multi-dimensionnel, 15° Colloque sur le traitement du signal et des images. Groupe d'Etudes du Traitement du Signal et des Images (GRESTI), 1995. ,
A categorical semantics of constructions, [1988] Proceedings. Third Annual Information Symposium on Logic in Computer Science, 1988. ,
DOI : 10.1109/LICS.1988.5125
CAL language report: Specification of the CAL actor language, 2003. ,
Taming heterogeneity - the Ptolemy approach, Proceedings of the IEEE, pp.127-144, 2003. ,
DOI : 10.1109/JPROC.2002.805829
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.12.8244
Functional Reactive Animation, International Conference on Functional Programming (ICFP'97, 1997. ,
DOI : 10.1145/258949.258973
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.17.7696
The Esterel v7 Reference Manual Version v7_30 -initial IEEE standardization proposal, pp.16-226, 2005. ,
http://www.esterel-technologies.com/products/ scade-suite, pp.14-188, 2015. ,
Some efficient solutions to the affine scheduling problem. I. One-dimensional time, International Journal of Parallel Programming, vol.40, issue.6, pp.313-347, 1992. ,
DOI : 10.1007/BF01407835
Some efficient solutions to the affine scheduling problem. Part II. Multidimensional time, International Journal of Parallel Programming, vol.2, issue.4, pp.389-420, 1992. ,
DOI : 10.1007/BF01379404
Scalable and Structured Scheduling, International Journal of Parallel Programming, vol.28, issue.6, 2006. ,
DOI : 10.1007/s10766-006-0011-4
On the expressive power of programming languages, European Symposium on Programming (ESOP'90, 1990. ,
A Multi-Periodic Synchronous Data-Flow Language, 2008 11th IEEE High Assurance Systems Engineering Symposium ,
DOI : 10.1109/HASE.2008.47
URL : https://hal.archives-ouvertes.fr/hal-00802695
Synchronous digital circuits as functional programs, ACM Computing Surveys, vol.46, issue.2, pp.1-21, 2013. ,
DOI : 10.1145/2543581.2543588
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.433.1977
Clock refinement in imperative synchronous languages, EURASIP Journal on Embedded Systems, vol.2013, issue.1, pp.1-21, 2013. ,
DOI : 10.1142/S0218126603000763
A modular memory optimization for synchronous data-flow languages, Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems, LCTES '12, pp.16-239, 2012. ,
DOI : 10.1145/2248418.2248426
Geometry of Synthesis: A Structured Approach to VLSI Design, Symposium on Principles of Programming Languages (POPL'07, p.17, 2007. ,
On the compositionality of round abstraction, CONCUR 2010-Concurrency Theory, pp.417-431, 2010. ,
Geometry of Synthesis II: From Games to Delay-Insensitive Circuits, Mathematical Foundations of Programming Semantics (MFPS'10, pp.166-234, 2010. ,
Geometry of Synthesis III: Resource Management Through Type Inference, Symposium on Principles of Programming Languages (POPL'11, pp.166-234, 2011. ,
Geometry of Synthesis IV: Compiling Affine Recursion Into Static Hardware, International Conference on Functional Programming, pp.166-234, 2011. ,
Linear logic, Theoretical Computer Science, vol.50, issue.1, pp.1-101, 1987. ,
DOI : 10.1016/0304-3975(87)90045-4
URL : https://hal.archives-ouvertes.fr/inria-00075966
Bounded linear logic: a modular approach to polynomial-time computability, Theoretical Computer Science, vol.97, issue.1, pp.1-66, 1992. ,
DOI : 10.1016/0304-3975(92)90386-T
URL : http://doi.org/10.1016/0304-3975(92)90386-t
A survey of automatic distribution method for synchronous programs, International Workshop on Synchronous Languages, Applications and Programs (SLAP'05), 2005. ,
Sémantiques et modèles d'exécution des langages réactifs synchrones application à Esterel, 1988. ,
Compiler techniques for scalable performance of stream programs on multicore architectures, 2010. ,
Programmer le parallélisme avec des futures en Heptagon un langage synchrone flot de données et étude des réseaux de Kahn en vue d'une compilation synchrone, pp.47-249, 2013. ,
Generating efficient code from data-flow programs, Third International Symposium on Programming Language Implementation and Logic Programming, pp.164-224, 1991. ,
DOI : 10.1007/3-540-54444-5_100
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.35.6974
Modelling and analysis of timed computer system behaviour Habilitation à Diriger des Recherches, 1984. ,
A Synchronous Language at Work: The Story of Lustre, International Conference on Formal Methods and Models for Co-Design (MEMOCODE'05, pp.16-47, 2005. ,
DOI : 10.1002/9781118459898.ch2
URL : https://hal.archives-ouvertes.fr/hal-00190883
Synchronous Observers and the Verification of Reactive Systems, International Conference on Algebraic Methodology and Software Technology (AMAS'93, 1994. ,
DOI : 10.1007/978-1-4471-3227-1_8
Modular resetting of synchronous data-flow programs, Proceedings of the 2nd ACM SIGPLAN international conference on Principles and practice of declarative programming , PPDP '00 ,
DOI : 10.1145/351268.351300
Categorical Logic and Type Theory, 1999. ,
LTL types FRP, Proceedings of the sixth workshop on Programming languages meets program verification, PLPV '12, 2012. ,
DOI : 10.1145/2103776.2103783
Towards a Common Categorical Semantics for Linear-Time Temporal Logic and Functional Reactive Programming, Mathematical Foundations of Programming Semantics (MFPS'XXVIII, 2012. ,
DOI : 10.1016/j.entcs.2012.08.015
Deriving bit-serial circuits in Ruby, VLSI'91, 1991. ,
Traced monoidal categories, Mathematical Proceedings of the Cambridge Philosophical Society, vol.1488, issue.03, pp.447-468, 1996. ,
DOI : 10.1007/BF02096491
The semantics of a simple language for parallel programming, Information Processing Congress (IFIP'74). IFIP, pp.12-46, 1974. ,
Properties of a Model for Parallel Computations: Determinacy, Termination, Queueing, SIAM Journal on Applied Mathematics, vol.14, issue.6, pp.1390-1411, 1966. ,
DOI : 10.1137/0114108
Higher-Order Functional Reactive Programming without Spacetime Leaks, International Conference on Functional Programming (ICFP'13). ACM, 2013. ,
Ultrametric Semantics of Reactive Programs, Annual Symposium on Logic in Computer Science (LICS'11, pp.107-234, 2011. ,
The mechanical evaluation of expressions, The Computer Journal, vol.6, issue.4, pp.308-320, 1964. ,
Correct and Efficient Bounded FIFO Queues, Computer Architecture and High Performance Computing (SBAC-PAD'13) ,
Programming real-time applications with SIGNAL, Proceedings of the IEEE, pp.1321-1336, 1991. ,
The ALPHA language and its use for the design of systolic arrays Journal of VLSI signal processing systems for signal, image and video technology, pp.173-182, 1991. ,
Synchronous data flow, Proceedings of the IEEE, vol.75, issue.9, pp.1235-1245, 1987. ,
Retiming Synchronous Circuitry, Algorithmica, 1991. ,
Clock constraint specification language: specifying clock constraints with UML/MARTE, Innovations in Systems and Software Engineering, pp.309-314, 2008. ,
DOI : 10.1007/s11334-008-0055-2
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.232.5738
The clock constraint specification language for building timed causality models, Innovations in Systems and Software Engineering, pp.99-106, 2010. ,
DOI : 10.1007/s11334-009-0109-0
URL : https://hal.archives-ouvertes.fr/inria-00464894
Scheduling and Buffer Sizing of n-Synchronous Systems, Mathematics of Program Construction, pp.225-236, 2012. ,
DOI : 10.1007/978-3-642-31113-0_6
ReactiveML, Proceedings of the 7th ACM SIGPLAN international conference on Principles and practice of declarative programming , PPDP '05, pp.110-228, 2005. ,
DOI : 10.1145/1069774.1069782
URL : https://hal.archives-ouvertes.fr/hal-00919271
Lucy-n: a n-Synchronous Extension of Lustre, Mathematics of Program Construction (MPC'10, pp.14-110, 2010. ,
DOI : 10.1007/978-3-642-13321-3_17
URL : https://hal.archives-ouvertes.fr/hal-00545801
Static Scheduling of Latency Insensitive Designs with Lucy-n, Formal Methods in Computer Aided Design (FMCAD'11), 2011. ,
URL : https://hal.archives-ouvertes.fr/hal-00654843
Time refinement in a functional synchronous language, International Symposium on Principles and Practice of Declarative Programming (PPDP'13, pp.47-228, 2013. ,
URL : https://hal.archives-ouvertes.fr/hal-00850290
Recursive Polymorphic Types and Parametricity in an Operational Framework, 20th Annual IEEE Symposium on Logic in Computer Science (LICS' 05), 2005. ,
DOI : 10.1109/LICS.2005.42
Periodic scheduling of marked graphs using balanced binary words, Theoretical Computer Science, vol.458, pp.113-130, 2012. ,
DOI : 10.1016/j.tcs.2012.08.012
URL : https://hal.archives-ouvertes.fr/hal-00672606
Efficient compilation of array iterators for Lustre, International Workshop on Synchronous Languages, Applications, and Programming, p.16, 2002. ,
DOI : 10.1016/S1571-0661(05)80437-2
URL : https://hal.archives-ouvertes.fr/hal-00387350
A Statically Allocated Parallel Functional Language, International Conference on Automata, Languages and Programming, 2000. ,
DOI : 10.1007/3-540-45022-X_5
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.43.3020
A modality for recursion, Proceedings Fifteenth Annual IEEE Symposium on Logic in Computer Science (Cat. No.99CB36332), 2000. ,
DOI : 10.1109/LICS.2000.855774
Functional reactive programming, continued, Proceedings of the ACM SIGPLAN workshop on Haskell , Haskell '02, 2002. ,
DOI : 10.1145/581690.581695
Symbolic performance analysis of elastic systems, International Conference on Computer-Aided Design (ICCAD'10, 2010. ,
Static Rate-Optimal Scheduling of Iterative Data- Flow Programs via Optimum Unfolding, Computer IEEE Transactions on, vol.40, issue.47, pp.178-195, 1991. ,
Raffinement temporel et exécution parallèle dans un langage synchrone fonctionnel, 2013. ,
Types and programming languages, 2002. ,
Relational Properties of Domains Information and Computation, pp.66-90, 1996. ,
Parametric polymorphism and operational equivalence, Mathematical Structures in Computer Science, vol.10, issue.3, pp.321-359, 2000. ,
DOI : 10.1017/S0960129500003066
Modèle n-synchrone pour la programmation de réseaux de Kahn à mémoire bornée, pp.188-226, 2010. ,
Concurrency in Synchronous Systems, Formal Methods in System Design, vol.18, issue.2, pp.111-130, 2006. ,
DOI : 10.1007/s10703-006-7844-8
URL : https://hal.archives-ouvertes.fr/inria-00071472
Lucid Synchrone: un langage synchrone d'ordre supérieur, pp.14-2002 ,
Lucid Synchrone, version 3. Tutorial and reference manual, pp.46-226, 2006. ,
Modular static scheduling of synchronous data-flow networks . Design Automation for Embedded Systems, pp.165-192, 2010. ,
Compilation séparée de programmes lustre, pp.248-249, 1988. ,
Compilation efficace d'un langage déclaratif synchrone : Le générateur de code Lustre-V3, pp.110-164, 1991. ,
Definitional interpreters for higher-order programming languages, Reprinted from the proceedings of the 25th ACM National Conference, pp.717-740, 1972. ,
Theories of Programming Languages, 1996. ,
The Meaning of Types ? From Intrinsic to Extrinsic Semantics, 2000. ,
Extension of the Lustre language and application to hardware design: the Lustre-v4 language and the Pollux system, pp.164-227, 1992. ,
URL : https://hal.archives-ouvertes.fr/tel-00342092
Implementing reactive programs on circuits a hardware implementation of LUSTRE, Real-Time: Theory in Practice (REX Workshop'92), 1992. ,
DOI : 10.1007/BFb0031993
A Type-theoretical Alternative to ISWIM, CUCH, OWHY. unpublished paper from 1969 later published in Theoretical Computer Science, pp.411-440, 1969. ,
DOI : 10.1016/0304-3975(93)90095-b
URL : http://doi.org/10.1016/0304-3975(93)90095-b
Latch optimization in circuits generated from high-level descriptions, Proceedings of International Conference on Computer Aided Design, 1996. ,
DOI : 10.1109/ICCAD.1996.569833
URL : https://hal.archives-ouvertes.fr/hal-00618122
Slowdown and Retiming in Ruby In IFIP Workshop on The Fusion of Hardware Design and Verification, 1988. ,
Hardware Design and Functional Programming: a Perfect Match, Journal of Universal Computer Science, 2005. ,
Domain-Theoretic Foundations of Functional Programming, World Scientific, pp.24-25, 2006. ,
DOI : 10.1142/6284
A scenario-aware data flow model for combined long-run average and worst-case performance analysis, International Conference on Formal Methods and Models for Co-Design (MEMOCODE'06, 2006. ,
Language and Compiler Support for Stream Programs, 2009. ,
StreamIt: A Language for Streaming Applications, Compiler Construction, pp.179-196, 2002. ,
DOI : 10.1007/3-540-45937-5_14
URL : http://cag.lcs.mit.edu/commit/papers/01/StreaMIT-TM-620.ps
Compositionality in synchronous data flow: Modular code generation from hierarchical sdf graphs, ACM Transactions on Embedded Computing Systems (TECS), vol.12, issue.3, p.83, 2013. ,
Realizability: an introduction to its categorical side, 2008. ,
On circuits and numbers. Computers, IEEE Transactions on, vol.43, pp.868-879, 1994. ,
LUCID, the Dataflow Programming Language, 1985. ,
Event-Driven FRP, Practical Aspects of Declarative Languages (PADL'02, 2002. ,
DOI : 10.1007/3-540-45587-6_11
The Essence of Principal Typings, International Conference on Automata, Languages and Programming (ICALP'02, 2002. ,
DOI : 10.1007/3-540-45465-9_78
The Formal Semantics of Programming Languages, pp.25-28, 1993. ,
Schedulability Analysis with CCSL Specifications, 2013 20th Asia-Pacific Software Engineering Conference (APSEC), 2013. ,
DOI : 10.1109/APSEC.2013.62
URL : https://hal.archives-ouvertes.fr/hal-00926305
Orcc, Proceedings of the 21st ACM international conference on Multimedia, MM '13, 2013. ,
DOI : 10.1145/2502081.2502231
URL : https://hal.archives-ouvertes.fr/hal-01059858