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Conception d'un processeur ultra basse consommation pour les noeuds de capteurs sans fil

Abstract : This PhD work focuses on the reduction of energy consumption and wake up time reduction of a WSN node microcontroller through innovations at architectural, circuit and power management level. This work proposes a partitioned microcontroller architecture between a programmable wake up processor, named Wake Up Controller on which this work is focused, and a main processor. The first deals with the common tasks of a wireless sensor node while the second manages the irregular tasks. TheWake Up Controller proposed in this work is a 16-bit RISC processor whose instruction set has been adapted to handle regular tasks of a sensor node. It only executes code on interruptions. It is implemented in asynchronous / synchronous mixed logic to improve wake up time and energy. A circuit was fabricated in a 28nm UTBB FDSOI technology integrating the Wake Up Controller. The core reaches 11,9 MIPS for 125 μW average power consumption in active phase and wakes up from sleep mode in 55ns from eight possible interruption sources. The static power consumption is around 4μW for the asynchronous logic core at 0.6V without power gating and 500nW when gated.
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Submitted on : Tuesday, August 22, 2017 - 3:00:24 AM
Last modification on : Monday, April 6, 2020 - 9:22:32 AM


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  • HAL Id : tel-01423146, version 2


Florent Berthier. Conception d'un processeur ultra basse consommation pour les noeuds de capteurs sans fil. Réseaux et télécommunications [cs.NI]. Université Rennes 1, 2016. Français. ⟨NNT : 2016REN1S130⟩. ⟨tel-01423146v2⟩



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