Skip to Main content Skip to Navigation

Mapping and Scheduling on Multi-core Processors using SMT Solvers

Abstract : In order to achieve performance gains in the software, computers have evolvedto multi-core and many-core platforms abounding with multiple processor cores.However the problem of finding efficient ways to execute parallel software onthese platform is hard. With a large number of processor cores available, thesoftware must orchestrate the communication, synchronization along with theexecution of the code. Communication corresponds to the transport of databetween different processors, which either can be handled transparently by thehardware or explicitly managed by the software. Synchronization is arequirement of proper selection of start time of computations eg. the conditionfor software tasks to begin execution only after all its dependencies aresatisfied.Models which represent the algorithms in a structured and formal way expose theavailable parallelism. Deployment of the software algorithms represented bysuch models needs a specification of which processor to execute the tasks on(mapping) and when to execute them (scheduling). Mapping andscheduling is a hard combinatorial problem to solve with a huge design spacecontaining exponential number of solutions. In addition, the solutions areevaluated according to different costs that need to be optimized, such asmemory consumption, time to execute, static power consumption, resources usedetc. Such a problem with multiple costs is called a multi-criteriaoptimization problem. The solution to this problem is not a unique singlesolution, but a set of incomparable solutions called Pareto solutions.In order to track multi-criteria problems, special algorithms are needed whichcan approximate the Pareto solutions in the design space.In this thesis we target a class of applications called streamingapplications, which process a continuous stream of data. These applicationstypically apply similar computation on different data items. A common class ofmodels called dataflow models conveniently expresses such applications.In this thesis, we deal with mapping and scheduling of dataflow applications onmany-core platforms. We encode this problem in form of logical constraints andpresent it to satisfiability modulo theory (SMT) solvers. SMT solvers,solve the encoded problem by using a combination of search techniques andconstraint propagation to find an assignment to the problem variablessatisfying the given cost constraints.In dataflow applications, the design space explodes with increased number oftasks and processors. In this thesis, we tackle this problem by introducingsymmetry reduction techniques and demonstrate that symmetry breakingaccelerates search in SMT solvers, increasing the size of the problem that canbe solved. Our design-space exploration algorithm approximates the Pareto frontof the problem and produces solutions with different cost trade-offs. Wevalidate these solutions by executing them on a real multi-core platform.Further we extend the scheduling problem to the many-core platforms which areassembled from multi-core clusters connected by network-on-chip. We provide adesign flow which performs mapping of the applications on such platforms andautomatic insertion of additional elements to model the communication. Wedemonstrate how communication with bounded memory can be performed by correctlymodeling the flow-control. We provide experimental results obtained on the256-processor Kalray MPPA-256 platform.Multi-core processors have typically a small amount of memory close to theprocessor. Generally application data does not fit in the local memory. Westudy a class of parallel applications having a regular data access pattern,with large amount of data to be processed by a uniform computation. Suchapplications are commonly found in image processing. The data must be broughtfrom main memory to local memory, processed and then the results written backto main memory, all in batches. Selecting the proper granularity of the datathat is brought into local memory is an optimization problem. We formalize thisproblem and provide a way to determine the optimal transfer granularitydepending on the characteristics of application and the hardware platform.Further we provide a technique to analyze different data exchange mechanismsfor the case where some data is shared between different computations.Applications in modern embedded systems can start and stop dynamically. Inorder to execute all these applications efficiently and to optimize globalcosts such as power consumption, execution time etc., the applications must bereconfigured at runtime. We present a predictable and composable way (executingindependently without affecting others) of migrating tasks according to thereconfiguration decision.
Document type :
Complete list of metadata

Cited literature [115 references]  Display  Hide  Download
Contributor : Pranav TENDULKAR Connect in order to contact the contributor
Submitted on : Wednesday, November 26, 2014 - 3:53:51 PM
Last modification on : Friday, March 25, 2022 - 9:43:52 AM
Long-term archiving on: : Friday, February 27, 2015 - 10:31:47 AM


  • HAL Id : tel-01087271, version 1



Pranav Tendulkar. Mapping and Scheduling on Multi-core Processors using SMT Solvers. Embedded Systems. Universite de Grenoble I - Joseph Fourier, 2014. English. ⟨tel-01087271⟩



Record views


Files downloads