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Bornes inférieures et supérieures dans les circuits arithmétiques

Abstract : Arithmetic complexity is the study of the required ressources for computing poynomials using only arithmetic operations. In the last of the 70s, Valiant defined (similarly to the boolean complexity) some classes of polynomials. The polynomials which have polynomial size circuits form the class VP. Exponential sums of these polynomials correspond to the class VNP. Valiant’s hypothesis is the conjecture that VP is different tVNP.Although this conjecture is still open, it seems more accessible than its boolean counterpart. The induced algebraic structure limits the possibilities of the computation. In particular, an important result states that the low de- gree polynomials can be efficiently computed in parallel. Moreover, if we allow a fair increasement of the size, it is possible to compute them with a constant depth. As this last model is very particular, some lower bounds are known.Bürgisser showed that a conjecture (τ-conjecture) which bounds the number of roots of some univariate polynomials, implies lower bounds in arithmetic complexity. But, what happens if we try to reduce as before the depth of the circuits for the polynomials? Bounding the number of real roots of some families of polynomials would imply a separation between VP and VNP. Finally we willstudy these upper bounds on the number of real roots.
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Submitted on : Monday, September 22, 2014 - 11:49:44 AM
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Sébastien Tavenas. Bornes inférieures et supérieures dans les circuits arithmétiques. Autre [cs.OH]. Ecole normale supérieure de lyon - ENS LYON, 2014. Français. ⟨NNT : 2014ENSL0921⟩. ⟨tel-01066752⟩



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