. Cette-méthode-est-aujourd-'hui-exploitée-au-laboratoire, Eynard (contrat post-doc), pour simuler le bruit de phase dans les synthétiseurs de fréquence. Un article de conférence a été soumis, REFERENCES BIBLIOGRAPHIQUES [ABS00] S. Abiteboul, P. Buneman, and D. Suciu, Data on the web from relations to semistructured data and XML, 2000.

. N. As, P. Lewis, M. M. Desgreys, Y. Louerat, I. Hervé et al., AS SoC-AMS -SP3 : Méthodes et Outils pour la conception des SoC-AMS -Rapport finalExperiences on Analog Circuit Technology Migration and Reuse, Proceedings of the Symposium on Integrated Circuits and Systems Design, pp.169-174, 2002.

C. [. Bontorin, Y. Lopez, N. Bornat, S. Lewis, A. Renaud et al., A real-time setup for multisite signal recording and processing in living neural networks, 2008 IEEE International Symposium on Circuits and Systems, pp.2953-2956, 2008.
DOI : 10.1109/ISCAS.2008.4542077
URL : https://hal.archives-ouvertes.fr/hal-00288433

. [. Boahen, Point-to-point connectivity between neuromorphic chips using address events, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.47, issue.5, pp.416-434, 2000.
DOI : 10.1109/82.842110

K. [. Bowen and . Coar, Apache server, 2000.

Y. Bornat, Réseaux de neurones sur silicium : une approche mixte analogique/numérique, pour l'étude des phénomènes d'adaptation, d'apprentissage et de plasticité, Thèse en Electronique, 2006.

C. Borchers, Symbolic behavioral model generation of non-linear analog circuits IEEE Transactions on circuits and systems -II : Analog and digital signal processing, pp.1362-1371, 1998.

D. [. Boyle, B. M. Pederson, J. E. Cohn, and . Solomon, Macromodeling of integrated circuit operational amplifiers, IEEE Journal of Solid-State Circuits, vol.9, issue.6, pp.353-364, 1974.
DOI : 10.1109/JSSC.1974.1050528

P. [. Benabid, C. Pollak, D. Gervason, D. M. Hoffmann, M. Gao et al., Long-term suppression of tremor by chronic stimulation of the ventral intermediate thalamic nucleus, The Lancet, vol.337, issue.8738, pp.403-406, 1991.
DOI : 10.1016/0140-6736(91)91175-T

M. [. Bornat, Y. Raoux, F. O. Boutaib, G. Morin, J. Charpentier et al., Detection of Electrical Activity of Pancreatic Beta-cells Using Micro-electrode Arrays, 2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications, 2010.
DOI : 10.1109/DELTA.2010.60
URL : https://hal.archives-ouvertes.fr/hal-00501820

S. [. Bontorin, A. Renaud, L. Garenne, G. Alvado, J. Lemasson et al., A Real-Time Closed-Loop Setup for Hybrid Neural Networks, 2007 29th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2007.
DOI : 10.1109/IEMBS.2007.4352961
URL : https://hal.archives-ouvertes.fr/hal-00181426

J. [. Belhadj, O. Tomas, G. Malot, Y. N-'kaoua, S. Bornat et al., FPGA-based architecture for real-time synaptic plasticity computation, 2008 15th IEEE International Conference on Electronics, Circuits and Systems, 2008.
DOI : 10.1109/ICECS.2008.4674799
URL : https://hal.archives-ouvertes.fr/hal-00320751

B. Belhadj, J. Tomas, O. Malot, Y. Bornat, G. N. Kaoua et al., Token-passing communication protocol in hardware-based real-time spiking neural networks, Bioengineered and Bioinspired Systems IV, 2009.
DOI : 10.1117/12.821682
URL : https://hal.archives-ouvertes.fr/hal-00414614

J. [. Bontorin, S. Tomas, and . Renaud, Low noise and low cost neural amplifiers, 2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007.
DOI : 10.1109/ICECS.2007.4511242
URL : https://hal.archives-ouvertes.fr/hal-00288402

H. Bergman, T. Wichmann, B. Karmon, and M. R. Delong, The primate subthalamic nucleus. II. Neuronal activity in the MPTP model of parkinsonism, Journal of Neurophysiology, vol.72, pp.507-520, 1994.

. Cadrf and . Cadence, RF block simulation

T. [. Cruccu, L. Aziz, P. Garcia-larrea, T. S. Hansson, J. P. Jensen et al., EFNS guidelines on neurostimulation therapy for neuropathic pain, European Journal of Neurology, vol.21, issue.3, pp.952-970, 2007.
DOI : 10.1136/jnnp.2003.022236

F. [. Chawla, G. Adil, P. E. Serrano, and . Hasler, Programmable Gm-C Filters Using Floating-Gate Operational Transconductance Amplifiers IEEE Transaction on Circuits and Systems I :Regular papers, pp.481-491, 2007.

F. [. Castro-lopez, O. Fernandez, A. Guerra-vinuesa, . Rodriguez, and . Vasquez, Reuse-based methodologies and tools in the design of analog and mixed-signal integrated circuits, 2006.

J. K. Chapin, K. A. Moxon, R. S. Markowitz, and M. A. Nicolelis, Real-time control of a robot arm using simultaneously recorded neurons in the motor cortex, Nature Neuroscience, vol.2, issue.7, pp.664-670, 1999.
DOI : 10.1038/10223

F. [. O-'connor, G. Tissafi-drissi, F. Revy, and . Gaffiot, UML/XML-based approach to hierarchical AMS synthesis", in Applications of specification & design languages for SoCs -Best of FDL'05, A. Vachoux, 2006.

M. Chiappalonea, A. Vatoa, M. Tedescoa, M. Marcolib, F. Davidec et al., Networks of neurons coupled to microelectrode arrays: a neuronal sensory system for pharmacological applications, Biosensors and Bioelectronics, vol.18, issue.5-6, pp.5-6, 2003.
DOI : 10.1016/S0956-5663(03)00041-1

. [. Deval, Conception de circuits intégrés analogiques -Elaboration d'une technique originale d'optimisation basée sur les plans d'expériences, Thèse en Electronique, 1994.

E. [. Demir, A. Liu, and . Sangiovanni-vincentelli, Time-domain non-Monte Carlo noise simulation for nonlinear dynamic circuits with arbitrary excitations, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.15, issue.5, pp.493-505, 1996.
DOI : 10.1109/43.506137

D. [. Demarse, A. W. Wagenaar, S. M. Blau, and . Potter, The neurally controlled animat : biological brains acting with simulated bodies, Autonomous Robots, vol.11, issue.3, 2001.

D. Eytan, N. Brenner, and S. Marom, Selective Adaptation in Networks of Cortical Neurons, Journal of Neuroscience, vol.23, pp.9349-9356, 2003.

N. [. Eynard, D. Lewis, B. Dallet, and . Legal, Efficient phase noise modelling of a PLL-based frequency synthesizer, Proceedings of the International Symposium on Communications, Control and Signal Processing, 2010.

. [. Escola, Traitement de signaux neuronaux sur système embarqué, Thèse en Electronique, 2008.

. [. Fakhfakh, Contribution à la modélisation comportementale des circuits radio-fréquence, Thèse en électronique, 2002.

A. Fakhakh, H. Levi, N. Lewis, and Y. Danto, Behavioral Modeling of Analogue and Mixed Integrated Systems with VHDL-AMS for RF Applications, Proceedings of the SBCCI02, Symposium on Integrated Circuits and Systems Design, 2002.

A. Fakhfakh, N. Milet-lewis, J. Bégueret, and H. Lévi, VHDL-AMS Model of a Synchronous Oscillator including Phase Noise, Proceedings of the FDL'01, Forum on Design Languages, 2001.
DOI : 10.1007/978-1-4757-6674-5_4
URL : https://hal.archives-ouvertes.fr/hal-00183167

A. Fakhfakh, N. Milet-lewis, J. Bégueret, and H. Lévi, VHDL-AMS Model of a Synchronous Oscillator including Phase Noise, System on chip design languages: extended papers : best of FDL'01 and HDLCon'01, A. Mignotte, E. Villar, and L. Horobin, 2002.
DOI : 10.1007/978-1-4757-6674-5_4
URL : https://hal.archives-ouvertes.fr/hal-00183167

N. [. Fakhfakh, Y. Milet-lewis, H. Deval, and . Lévi, Study and behavioral simulation of phase noise and jitter in oscillators, Proceedings of the 2001 IEEE International Symposium on Circuits and Systems, 2001.
URL : https://hal.archives-ouvertes.fr/hal-00184304

N. [. Fakhfakh, H. Milet-lewis, T. Levi, and . Zimmer, A systematic approach for the behavioural modelling of analogue integrated systems, Proceedings of the ACIDCA'2000, International Conference on Artificial and Computational Intelligence For Decision, Control and Automation In Engineering and Industrial Applications, 2000.
URL : https://hal.archives-ouvertes.fr/hal-00203976

J. Georgiou and C. Toumazou, A micropower cochlear prosthesis system, Proceedings of the International Conference on Digital Signal Processing, pp.343-348, 2002.

P. [. Gray, S. H. Hurst, R. G. Lewis, and . Meyer, Analysis and design of analog integrated circuits, INC, 2001.

M. Ghovanloo, Intergrated circuits for neural interfacing : neural stimulation", in VLSI Circuits for Biomedical Applications, pp.191-199, 2008.

. [. Gielen, Design and modeling tools for analog/RF circuits in mixed-signal integrated systems on chip, Proceedings of the Forum on Design Languages, FDL'02, 2002.

G. Gielen and W. Sansen, Symbolic Analysis for Automated Design of Analog Integrated Circuits, 1991.
DOI : 10.1007/978-1-4615-3962-9

M. [. Gosselin and . Sawan, An ultra low-power CMOS action potential detector, 2008 IEEE International Symposium on Circuits and Systems, 2008.
DOI : 10.1109/ISCAS.2008.4542022

C. Galup-montoro, M. C. Schneider, and R. Coitinho, Resizing rules for MOS analog-design reuse, IEEE Design & Test of Computers, vol.19, issue.2, pp.50-58, 2002.
DOI : 10.1109/54.990442

Q. Gu, RF system design of transceivers for wireless communications, 2005.

M. Guglielmi, Synthese de signaux en 1/f avec controle de la precision spectrale, GRETSI, 2042.

R. [. Guillory and . Normann, A 100-channel system for real time detection and storage of extracellular spike waveforms, Journal of Neuroscience Methods, vol.91, issue.1-2, pp.1-2
DOI : 10.1016/S0165-0270(99)00076-X

C. [. Harrison and . Charles, A low-power, low-noise CMOS amplifier for neural recording applications, IEEE J. Solid-State Circuits, vol.38, issue.6, 2003.

. [. Harrison, The Design of Integrated Circuits to Observe Brain Activity, Proceedings of the IEEE, pp.1203-1216, 2008.
DOI : 10.1109/JPROC.2008.922581

F. Heimburger, Parkinson n' est plus une fatalité, Chercheurs d'Aquitaine -Zoom sur les Neurosciences, pp.6-7, 2009.

M. [. Heuschkel, M. Fejtl, D. Raggenbass, P. Bertrand, and . Renaud, A three-dimensional multi-electrode array for multi-site stimulation and recording in acute brain slices, Journal of Neuroscience Methods, vol.114, issue.2, pp.135-148, 2002.
DOI : 10.1016/S0165-0270(01)00514-3

A. [. Hodgkin and . Huxley, A quantitative description of membrane current and its application to conduction and excitation in nerve, The Journal of Physiology, vol.117, issue.4, pp.500-544, 1952.
DOI : 10.1113/jphysiol.1952.sp004764

R. R. Harrison, G. Santhanam, and V. V. Krishna, Local field potential measurement with low-power analog integrated circuit, The 26th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, pp.4067-4070, 2004.
DOI : 10.1109/IEMBS.2004.1404135

P. [. Harrison, R. J. Watkins, R. O. Kier, D. J. Lovejoy, B. Black et al., A Low-Power Integrated Circuit for a Wireless 100-Electrode Neural Recording System, IEEE Journal of Solid-State Circuits, vol.42, issue.1, pp.123-133, 2007.
DOI : 10.1109/JSSC.2006.886567

. [. Iskander, Connaissance et synthèse en vue de la conception et la réutilisation de circuits analogiques intégrés, Thèse en Informatique, 2008.

. Isn and . Isn, Engineering of Neuromorphic Systems Web page

T. [. Jochum, P. Denison, and . Wolf, Integrated circuit amplifiers for multi-electrode intracortical recording, Journal of Neural Engineering, vol.6, issue.1, 2009.
DOI : 10.1088/1741-2560/6/1/012001

. [. Kasdin, Discrete simulation of colored noise and stochastic processes and1/f power law noise generation, Proceedings of the IEEE, pp.802-827, 1995.

. [. Kundert, Introduction to RF simulation and its application", in The Designer's Guide community, 2003.

. [. Kundert, Predicting the phase noise and jitter of PLL-based frequency synthesizers", in The Designer's Guide community, Version 4g, 2006.

. [. Laflaquière, Neurones artificiels sur Silicium : conception analogique et construction de réseaux hybrides, Thèse en électronique, 1998.

P. [. Levy, W. D. Ashby, A. E. Hutchison, A. M. Lang, J. O. Lozano et al., Dependence of subthalamic nucleus oscillations on movement and dopamine in Parkinson's disease, Brain, vol.125, issue.6, pp.1196-1209, 2002.
DOI : 10.1093/brain/awf128

Y. [. Lewis, L. Bornat, C. Alvado, A. Lopez, T. Daouzli et al., PAX : un outil logiciel / matériel d'investigation pour les neurosciences computationnelles, Proceedings of the NeuroComp'06, Conférence française de Neurosciences Computationnelles, 2006.

J. [. Levi, S. Beche, R. Bonnet, and . Guillemaud, IP-based Toolbox for Digital Signal Processing Reuse: Application to Real-time Spike Sorting, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00514203

N. Lewis, Y. Bornat, and S. Renaud, Spiking Neural Network Hardware implementation : from single neurons to networks, Proceedings of the NeuroComp'09, Conférence française de Neurosciences Computationnelles, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00986320

. [. Lee, Analysis of jitter in phase-locked loops, IEEE Transactions on Circuits And Systems-II: Analog and digital signal processing, pp.704-711, 2002.
DOI : 10.1109/TCSII.2002.807265

. [. Legal, Contribution à la prise en compte des contraintes des applications TDSI dans la synthèse de haut niveau, Thèse en Electronique, 2005.

S. [. Lewis and . Renaud, Spiking neural networks "in silico" : from single neurons to large scale networks, Proceedings of the Systems, Signal and Devices Conference, SSD'07, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00181415

T. Levi, Méthodologie de développement d'une bibliothèque d'IP-AMS en vue de la conception automatisée de systèmes sur puce analogiques et mixtes : application à l'ingénierie neuromorphique, Thèse en électronique, 2007.

. [. Levy, Complex-curve fitting, IRE Transactions on Automatic Control, vol.4, issue.1, pp.37-43, 1959.
DOI : 10.1109/TAC.1959.6429401

L. Lewis, Synthèse automatique de bruit via Scilab, 2004.

. [. Milet-lewis, Contribution a la modélisation comportementale des circuits analogiques, Thèse en électronique, 1997.

M. S. Lewickiy, A review of methods for spike sorting: the detection and classification of neural action potentials, Network: Computation in Neural Systems, vol.9, issue.4, pp.53-78, 1998.
DOI : 10.1088/0954-898X_9_4_001

T. Levi, N. Lewis, S. Saïghi, J. Tomas, Y. Bornat et al., Neuromimetic Integrated Circuits, pp.241-262, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00319278

T. Levi, N. Lewis, J. Tomas, and P. Fouillat, Scaling Rules For Mos Analog Design Reuse, Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006., 2006.
DOI : 10.1109/MIXDES.2006.1706603
URL : https://hal.archives-ouvertes.fr/hal-00181379

]. T. Llt07a, N. Levi, J. Lewis, P. Tomas, and . Fouillat, IP-based design for analogue ASICs : a case study, 2007.

T. Levi, N. Lewis, J. Tomas, and P. Fouillat, IP-Based Library for Analog Design Reuse, Proceedings of the Colloque du GDR SoC-SIP, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00181424

]. T. Llt07c, N. Levi, J. Lewis, P. Tomas, and . Fouillat, Scaling Guidelines for CMOS Linear Analog Design, Proceedings of the IEEE Ph.D. Research In Microelectronics and Electronics Conference, PRIME'07, pp.209-212, 2007.

T. Levi, N. Lewis, J. Tomas, and P. Fouillat, IP-based methodology for analog design flow: Application on neuromorphic engineering, 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, pp.343-346, 2008.
DOI : 10.1109/NEWCAS.2008.4606391
URL : https://hal.archives-ouvertes.fr/hal-00514205

G. [. Lewis, L. Monnerie, J. Lewis, P. Sabatier, and . Melchior, Génération de modèles de bruit en 1/f N pour la simulation des systèmes électroniques, Proceedings of the Journées de l'action thématique " Les systèmes à dérivées non entières ", SDNE'05, 2005.

G. [. Lewis, L. Monnerie, J. Lewis, P. Sabatier, and . Melchior, Automatic procedure generating noise models for discrete-time applications, 2006 IEEE International Symposium on Circuits and Systems, 2006.
DOI : 10.1109/ISCAS.2006.1693934

N. Lewis, G. Monnerie, J. Sabatier, P. Melchior, M. Robbe et al., Using fractional differentiation for modelling of 1/f noise -Application to discrete-time noise sources in VHDL- AMS, Proceedings of the IEEE International Symposium on Industrial Electronics, 2004.

S. [. Lemasson, D. Renaud, T. Debay, and . Bal, Feedback inhibition controls spike transfer in hybrid thalamic circuits, Nature, vol.15, issue.6891, pp.854-858, 2002.
DOI : 10.1038/nature00825

]. T. Ltl07a, J. Levi, N. Tomas, P. Lewis, and . Fouillat, IP-based design reuse for analogue systems: a case study, Proceedings of the SPIE VLSI Circuits and Systems III, Maspalomas, 2007.

T. Levi, J. Tomas, N. Lewis, and P. Fouillat, Resizing methodology for CMOS analog circuit, Proceedings of the SPIE VLSI Circuits and Systems III Maspalomas, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00181420

J. [. Levi, N. Tomas, P. Lewis, and . Fouillat, A CMOS Resizing Methodology for Analog Circuits, IEEE Design & Test of Computers, vol.26, issue.1, pp.78-87, 2009.
DOI : 10.1109/MDT.2009.1

G. [. Marom and . Shahaf, Development, learning and memory in large random networks of cortical neurons: lessons beyond anatomy, Quarterly Reviews of Biophysics, vol.35, issue.01, pp.63-87, 2002.
DOI : 10.1017/S0033583501003742

J. [. Milet-lewis, H. Charlot, T. Levi, A. Zimmer, J. Laflaquière et al., Using VHDL- AMS to build a specific analogue behavioural model library, Proceedings of the FDL'99, 2nd Forum on Design Languages, E.N.S, 1999.

J. [. Milet-lewis, T. Charlot, H. Zimmer, A. Levi, and . Laflaquière, Comparing Four Analog HDL Modelings and Simulations of a Complex System, Proceedings of the BMAS'99, 1999.

. [. Medhat-nazmi, Génération automatique de modèles de performances pour circuits intégrés analogiques, 2009.

J. Michel and F. Schwartz, Analogue circuit sizing method using interval analysis, 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, pp.331-334, 2008.
DOI : 10.1109/NEWCAS.2008.4606388
URL : https://hal.archives-ouvertes.fr/hal-00349890

T. [. Milet-lewis and . Zimmer, Initiation à la conception analogique hiérarchique par modélisation comportementale, Proceedings of the CETSIS-EEA'99, Colloque sur l'Enseignement des Technologies et des Sciences de l'Information et des Systèmes, 1999.

G. Monnerie, N. Lewis, D. Dallet, H. Levi, and M. Robbe, Modelling of transient noise sources with VHDL-AMS and normative spectral interpretation, Proceedings of the Forum on Design Languages, FDL'03, 2003.
URL : https://hal.archives-ouvertes.fr/hal-00183670

H. [. Monnerie, N. Levi, P. Lewis, and . Fouillat, Behavioral modeling of noise in discrete time systems with VHDL-AMS application to a sigma-delta modulator, 2004 IEEE International Conference on Industrial Technology, 2004. IEEE ICIT '04., 2004.
DOI : 10.1109/ICIT.2004.1490289

G. [. Milet-lewis, A. Monnerie, D. Fakhfakh, Y. Geoffroy, H. Hervé et al., A VHDL-AMS library of RF blocks models, Proceedings of the Fifth IEEE International Workshop on Behavioral Modeling and Simulation. BMAS 2001 (Cat No.01TH8601), 2001.
DOI : 10.1109/BMAS.2001.962490

G. Monnerie, Modélisation VHDL-AMS d'un synthétiseur de fréquence fractionnaire, ENSEIRB - Université Bordeaux, vol.1, 2009.

. [. Monnerie, Etude et modélisation de sources de bruit dans des structures à temps discret, Thèse en électronique, 2005.

V. [. Martinoia, L. Sanguinett, L. Cozzi, J. V. Berdondini, J. Pelt et al., Towards an embodied in vitro electrophysiology: the NeuroBIT project, Neurocomputing, vol.58, issue.60, pp.58-60, 2004.
DOI : 10.1016/j.neucom.2004.01.167
URL : https://hal.archives-ouvertes.fr/hal-00203949

T. [. Milet-lewis, J. P. Zimmer, and . Dom, Macromodeling of operational amplifiers, Proceedings of the 2nd European IC-CAP User Meeting, 1994.

T. [. Milet-lewis, J. P. Zimmer, and . Dom, High-Frequency Modeling of Op-Amps, Characterization Solutions, pp.6-11, 1996.

N. Milet-lewis, T. Zimmer, J. B. Duluc, and A. Meresse, Génération automatique d'un macromodèle multi-niveau d'amplificateur opérationnel, Proceedings of the Colloque CAO de circuits intégrés et systèmes, 1997.

S. [. Narasimha, R. M. Bandi, P. R. Rao, and . Mukund, 1/f noise synthesis model in discrete-time for circuit simulation, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.52, issue.6, pp.1104-1114, 2005.
DOI : 10.1109/TCSI.2005.849112

Y. Nama, E. A. Brownb, J. D. Rossc, R. A. Blumb, B. C. Wheelera et al., A retrofitted neural recording system with a novel stimulation IC to monitor early neural responses from a stimulating electrode, Journal of Neuroscience Methods, vol.178, issue.1, pp.99-102, 2009.
DOI : 10.1016/j.jneumeth.2008.11.017

. [. Nguyentuong, Définition et implantation d'un langage de conception de composants analogiques réutilisables, Thèse en Informatique, 2006.

M. A. Nicolelis, Actions from thoughts, pp.403-407, 2001.

A. L. Owens, T. J. Denison, H. Versnel, M. Rebbert, M. Peckerar et al., Multielectrode array for measuring evoked potentials from surface of ferret primary auditory cortex, Journal of neuroscience methods, vol.58, pp.1-2, 1995.

A. Oustaloup, F. Levron, B. Mathieu, and F. Nanot, Frequency-band complex noninteger differentiator: characterization and synthesis, IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, vol.47, issue.1, pp.25-40, 2000.
DOI : 10.1109/81.817385

. [. Oustaloup, La dérivation non entière : théorie, synthèse et applications dans les sciences pour l'ingénieur, Editions Hermès, 1995.

Y. Perelman and R. Ginosar, Analog frontend for multichannel neuronal recording system with spike and LFP separation, Journal of Neuroscience Methods, vol.153, issue.1, pp.21-26, 2006.
DOI : 10.1016/j.jneumeth.2005.09.017

Y. Perelman and R. Ginosar, The NeuroProcessor -An Integrated Interface to Biological Neural Networks, 2008.

J. Phillips and K. Kundert, An introduction to cyclostationary noise", in The Designer's Guide community, Version 1a, 2000.

J. Park, K. Muhammad, and K. Roy, Efficient generation of 1/f/sup ??/ noise using a multi-rate filter bank, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003., 2003.
DOI : 10.1109/CICC.2003.1249491

V. [. Rousseau, G. Perrais, R. Charvet, G. Guillemaud, P. Lissorgues et al., New high-density 3D MEAs associated with integrated electronics system (BioMEA?), Proceedings of the Proceedings of the MicroTAS'2007 Conference, 2007.

. [. Saighi, Circuits et systèmes de modélisation analogique de réseaux de neurones biologiques : application au développement d'outils pour les neuroscience computationnelles, Thèse en Electronique, 2004.

L. [. Savio, Z. M. Colalongo, and . Kovacs-vajna, Automatic Scaling Procedures for Analog Design Reuse, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.53, issue.12, pp.2539-2547, 2006.
DOI : 10.1109/TCSI.2006.883849

C. [. Staszewski, P. T. Fernando, and . Balsara, Event-driven Simulation and modeling of phase noise of an RF oscillator, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.52, issue.4, pp.723-733, 2005.
DOI : 10.1109/TCSI.2005.844236

S. [. Shahaf and . Marom, Learning in Networks of Cortical Neurons, Journal of Neuroscience, vol.21, pp.8782-8788, 2001.

C. J. Shi and A. Vachoux, VHDL-A Design Objectives And Rationale, Current issues in electronic modeling, pp.1-30, 1995.
DOI : 10.1007/978-1-4615-2333-8_1

M. [. Scherberger, R. A. Jarvis, and . Andersen, Cortical Local Field Potential Encodes Movement Intentions in the Posterior Parietal Cortex, Neuron, vol.46, issue.2, pp.347-354, 2005.
DOI : 10.1016/j.neuron.2005.03.004

S. [. Saleh, S. Wilton, A. Mirabbasi, M. Hu, G. Greenstreet et al., System-on-Chip: Reuse and Integration, Proceedings of the IEEE, vol.94, issue.6, pp.1050-1069, 2006.
DOI : 10.1109/JPROC.2006.873611
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.224.5657

M. Terrovitis and K. Kundert, Device noise simulation of modulators", in The Designer's Guide community, Version 1, 1999.

R. [. Theodore and . Fisher, Brain stimulation for epilepsy, The Lancet Neurology, vol.3, issue.2, pp.111-118, 2004.
DOI : 10.1016/S1474-4422(03)00664-1

N. [. Levi, Y. Lewis, A. Bornat, J. Destexhe, and . Tomas, An IP-based library for the design of analog Hodgkin Huxley neurons, Proceedings of the Systems, Signal and Devices Conference, SSD'07, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00181412

I. [. Tissafi-drissi, F. Connor, and . Gaffiot, RUNE: platform for automated design of integrated multi-domain systems application to high-speed CMOS photoreceiver front-ends, Proceedings Design, Automation and Test in Europe Conference and Exhibition, pp.16-21, 2004.
DOI : 10.1109/DATE.2004.1269191

C. A. Thomas, P. A. Springer, G. E. Loeb, Y. Berwald-netter, and L. M. Okun, A miniature microelectrode array to monitor the bioelectric activity of cultured cells, Experimental Cell Research, vol.74, issue.1, pp.61-67, 1972.
DOI : 10.1016/0014-4827(72)90481-8

S. [. Taylor, A. B. Tillery, and . Schwartz, Direct Cortical Control of 3D Neuroprosthetic Devices, Science, vol.296, issue.5574, pp.1829-1832, 2002.
DOI : 10.1126/science.1070291

A. Vachoux, Méthodes et outils pour la modélisation de SoC-AMS", exposé pour AS SoC

R. J. Vogelstein, U. Mallik, and G. Cauwenberghs, Beyond address-eventcommunication", in Institute of Neuromorphic Engineering (INE) -The Neuromorphic Engineer

M. Velliste, S. Perel, M. C. Spalding, A. S. Whitford, and A. B. Schwartz, Cortical control of a prosthetic arm for self-feeding, Nature, vol.54, issue.7198, pp.1098-1101, 2008.
DOI : 10.1038/nature06996

. Vsia, Analog/Mixed-Signal VSI Extension Specification Version 2.2

. Vsia-], Virtual Socket Interface Alliance

W. [. Wei, Impedance characteristics of deep brain stimulation electrodes in vitro and in vivo, Journal of Neural Engineering, vol.6, 2009.

J. D. Weiland, W. Liu, and M. S. Humayun, Retinal Prosthesis, Annual Review of Biomedical Engineering, vol.7, issue.1, pp.361-401, 2005.
DOI : 10.1146/annurev.bioeng.7.060804.100435

R. [. Wagenaar, J. Madhavan, S. M. Pine, and . Potter, Controlling Bursting in Cortical Cultures with Closed-Loop Multi-Electrode Stimulation, Journal of Neuroscience, vol.25, issue.3, pp.680-688, 2005.
DOI : 10.1523/JNEUROSCI.4209-04.2005

D. A. Wagenaar, J. Pine, and S. M. Potter, Searching for plasticity in dissociated cortical cultures on multi-electrode arrays, Journal of Negative Results in BioMedicine, 2006.

T. Zimmer, N. Milet-lewis, A. Fakhfakh, B. Ardouin, H. Levi et al., Hierarchical analogue design and behavioural modelling, Proceedings 1999 IEEE International Conference on Microelectronic Systems Education (MSE'99) 'Systems Education in the 21st Century' (Cat. No.99-63794), 1999.
DOI : 10.1109/MSE.1999.787037

L. Des, P. De-l-'p1-]-n, T. Milet-lewis, J. P. Zimmer, and . Dom, AUTEUR 8 articles High-Frequency Modeling of Op-Amps, Characterization Solutions, European Edition, pp.6-11, 1996.

N. [. Duluc, J. P. Milet-lewis, and N. Dom, A wafer level reliability method for short-loop processing, Microelectronics and Reliability, pp.11-12, 1996.

J. [. Zimmer, N. Duluc, and . Milet-lewis, Method for BJT transit time evaluation, Electronics Letters, vol.34, issue.20, p.34, 1920.
DOI : 10.1049/el:19981219

N. [. Fakhfakh, J. Milet-lewis, H. Bégueret, and . Lévi, VHDL-AMS Model of a Synchronous Oscillator including Phase Noise, in System on chip design languages: extended papers : best of FDL'01 and HDLCon'01, Mignotte, E. Villar, and L. Horobin, 2002.

F. [. Mongellaz, N. Marc, Y. Milet-lewis, and . Danto, Contribution to ageing simulation of complex analogue circuit using VHDL-AMS behavioural modelling, Microelectronics Reliability, pp.9-11, 2002.

N. [. Levi, J. Lewis, P. Tomas, and . Fouillat, IP-based design for analogue ASICs : a case study, in Design & Re-use, D&R Industry Articles, 2007.

M. [. Lewis, D. Billaud, P. Geoffroy, T. Cazenave, and . Zimmer, A Distance Measurement Platform Dedicated to Electrical Engineering, IEEE Transactions on Learning Technologies, vol.2, issue.4, 2009.
DOI : 10.1109/TLT.2009.45
URL : https://hal.archives-ouvertes.fr/hal-00450208

J. [. Levi, N. Tomas, P. Lewis, and . Fouillat, A CMOS Resizing Methodology for Analog Circuits, IEEE Design & Test of Computers, vol.26, issue.1, pp.78-87, 2009.
DOI : 10.1109/MDT.2009.1

T. Levi, N. Lewis, S. Saïghi, J. Tomas, Y. Bornat et al., Neuromimetic Integrated Circuits, in VLSI Circuits for, pp.241-262, 2008.

C. , N. Milet-lewis, T. Zimmer, and J. P. Dom, Macromodeling of operational amplifiers, 41 communications dont 1 en soumission : [ 2nd European IC-CAP User Meeting, 1994.

J. [. Zimmer, N. Duluc, J. P. Milet-lewis, and . Dom, A new WLR method based on model parameter analysis, IEEE 1995 International Integrated Reliability Workshop. Final Report, 1995.
DOI : 10.1109/IRWS.1995.493596

S. [. Zimmer, P. Limtouch, J. B. Lehalpère, N. Duluc, J. P. Milet-lewis et al., Process reliability assessment based on SPICE parameter analysis, European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, p.95, 1995.

J. [. Zimmer, B. Berkner, N. Branciard, J. B. Milet-lewis, J. P. Duluc et al., Method for determining the effective base resistance of bipolar transistors, Proceedings of the 1996 BIPOLAR/BiCMOS Circuits and Technology Meeting, 1996.
DOI : 10.1109/BIPOL.1996.554622

T. [. Duluc, N. Zimmer, J. P. Milet-lewis, and . Dom, Determination of critical process steps for enhanced yield improvement, SPIE, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis II, 1996.

T. [. Milet-lewis, J. B. Zimmer, A. Duluc, and . Meresse, Génération automatique d'un macromodèle multi-niveau d'amplificateur opérationnel, Colloque CAO de circuits intégrés et systèmes, 1997.

T. Zimmer, J. B. Duluc, N. M. Lewis, and J. P. Dom, Advanced statistical tools for worst case parameter analysis, European IC-CAP User Meeting, 1997.

T. [. Duluc, N. M. Zimmer, J. P. Lewis, and . Dom, Worst case parameter generation methodology for analogue and digital circuit simulation, IEEE International Cconference on Microelctronics, ICM'95, 1997.

N. Milet-lewis, J. Charlot, H. Levi, T. Zimmer, A. Laflaquière et al., Using VHDL-AMS to build a specific analogue behavioural model library, FDL'99

J. [. Milet-lewis, T. Charlot, H. Zimmer, A. Levi, and . Laflaquière, Comparing Four Analog HDL Modelings and Simulations of a Complex System, BMAS'99, 1999.

T. [. Milet-lewis and . Zimmer, Initiation à la conception analogique hiérarchique par modélisation comportementale, CETSIS-EEA'99, Colloque sur l'Enseignement des Technologies et des Sciences de l'Information et des Systèmes, 1999.

J. [. Zimmer, B. Duluc, N. Ardouin, F. Milet-lewis, P. Marc et al., Comparison of three approaches for SPICE parameter determination, European IC-CAP User Group Meeting, 1999.

A. Fakhfakh, N. Milet-lewis, H. Levi, and T. Zimmer, A systematic approach for the behavioural modelling of analogue integrated systems, ACIDCA'2000, International Conference on Artificial and Computational Intelligence For Decision, Control and Automation In Engineering and Industrial Applications, 2000.
URL : https://hal.archives-ouvertes.fr/hal-00203976

J. Charlot, J. K. Seon, N. Milet-lewis, H. Lévi, and J. Charlot, A VHDL-AMS approach for analysing thermo-electrical effects in EEPROMs, International Conference on Mixed Design of Integrated Circuits and Systems, MIXDES'00, 2000.

J. Charlot, J. Oudinot, N. Milet-lewis, T. Zimmer, and H. Lévi, Speaking VHDL-AMS, a newly standarized description language, for teaching mixed technology and mixed signal systems, International Conference on Information Technology Based Higher Education and Training, ITHET'00, 2000.
URL : https://hal.archives-ouvertes.fr/hal-00203977

H. [. Milet-lewis, T. Lévi, J. Zimmer, and . Battaglia, VHDL-AMS : un outil pour la simulation des systèmes électroniques et multi-technologiques, Sixièmes Journées Pédagogiques du CNFM, 2000.

A. Fakhfakh, N. Milet-lewis, J. Bégueret, and H. Lévi, VHDL-AMS Model of a Synchronous Oscillator including Phase Noise, in FDL'01, Forum on Design Languages, 2001.

A. Fakhfakh, N. Milet-lewis, Y. Deval, and H. Lévi, Study and behavioral simulation of phase noise and jitter in oscillators, 2001 IEEE International Symposium on Circuits and Systems, 2001.
URL : https://hal.archives-ouvertes.fr/hal-00184304

J. Charlot, N. Milet-lewis, T. Zimmer, and H. Lévi, VHDL-AMS for mixed technology and mixed signal, an overview, The 9th Mediterranean Conference on Control and Automation, MED'01, 2001.
URL : https://hal.archives-ouvertes.fr/hal-00203975

H. [. Fakhakh, N. Levi, Y. Lewis, and . Danto, Behavioral Modeling of Analogue and Mixed Integrated Systems with VHDL-AMS for RF Applications, SBCCI02, Symposium on Integrated Circuits and Systems Design, 2002.

N. Milet-lewis, S. Snaidero, Y. Herve, G. Monnerie, and D. Geoffroy, Behavioural library development : validation and qualification, Forum on Design Languages, FDL'02, 2002.

G. Monnerie, N. Lewis, D. Dallet, H. Levi, and M. Robbe, Modelling of transient noise sources with VHDL-AMS and normative spectral interpretation, Forum on Design Languages, p.3, 2003.
URL : https://hal.archives-ouvertes.fr/hal-00183670

N. Lewis, G. Monnerie, J. Sabatier, P. Melchior, M. Robbe et al., Using fractional differentiation for modelling of 1/f noise -Application to discrete-time noise sources in VHDL-AMS, IEEE International Symposium on Industrial Electronics, 2004.

G. Monnerie, H. Levi, N. Lewis, and P. Fouillat, Behavioral modeling of noise in discrete time systems with VHDL-AMS application to a sigma-delta modulator, 2004 IEEE International Conference on Industrial Technology, 2004. IEEE ICIT '04., 2004.
DOI : 10.1109/ICIT.2004.1490289

G. [. Lewis, L. Monnerie, J. Lewis, P. Sabatier, and . Melchior, Génération de modèles de bruit en 1/f N pour la simulation des systèmes électroniques, in Journées de l'action thématique " Les systèmes à dérivées non entières, p.5, 2005.

N. [. Levi, J. Lewis, P. Tomas, and . Fouillat, Scaling Rules for MOS Analog Design Reuse, in Mixed Design of Integrated Circuits and Systems MIXDES, 2006.

Y. [. Lewis, L. Bornat, C. Alvado, A. Lopez, T. Daouzli et al., PAX : un outil logiciel / matériel d'investigation pour les neurosciences computationnelles, NeuroComp'06, Conférence française de Neurosciences Computationnelles, 2006.

N. [. Levi, Y. Lewis, A. Bornat, J. Destexhe, and . Tomas, An IP-based library for the design of analog Hodgkin Huxley neurons, Systems, Signal and Devices Conference, SSD'07, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00181412

T. Levi, N. Lewis, J. Tomas, and P. Fouillat, IP-Based Library for Analog Design Reuse, Colloque du GDR SoC-SIP, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00181424

N. [. Levi, J. Lewis, P. Tomas, and . Fouillat, Scaling guidelines for CMOS linear analog design, 2007 Ph.D Research in Microelectronics and Electronics Conference, 2007.
DOI : 10.1109/RME.2007.4401849
URL : https://hal.archives-ouvertes.fr/hal-00414788

T. Levi, J. Tomas, N. Lewis, and P. Fouillat, IP-based design reuse for analogue systems: a case study, in SPIE VLSI Circuits and Systems III, 2007.

J. [. Levi, N. Tomas, P. Lewis, and . Fouillat, Resizing methodology for CMOS analog circuit, in SPIE VLSI Circuits and Systems III, 2007.

S. [. Lewis and . Renaud, Spiking neural networks "in silico" : from single neurons to large scale networks, Systems, Signal and Devices Conference, SSD'07, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00181415

G. Bontorin, C. Lopez, Y. Bornat, N. Lewis, S. Renaud et al., A real-time setup for multisite signal recording and processing in living neural networks, 2008 IEEE International Symposium on Circuits and Systems, 2008.
DOI : 10.1109/ISCAS.2008.4542077
URL : https://hal.archives-ouvertes.fr/hal-00288433

T. Levi, N. Lewis, J. Tomas, and P. Fouillat, IP-based methodology for analog design flow: Application on neuromorphic engineering, 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, 2008.
DOI : 10.1109/NEWCAS.2008.4606391
URL : https://hal.archives-ouvertes.fr/hal-00514205

N. Lewis, T. Zimmer, M. Billaud, and D. Geoffroy, An E-Learning Experience in Practical Electronics: Technological and Pedagogical Aspects, 5th Congress of Scientific Research Outlook in the Arab World, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00327562

H. Mnif, S. Sahnoun, F. Hdiji, D. Geoffroy, M. Billaud et al., Electronic Practical Course via the Web in a Virtual Laboratory, International Conference on Remote Engineering & Virtual instrumentation, p.8, 2008.
URL : https://hal.archives-ouvertes.fr/hal-00327567

G. Eynard, N. Lewis, D. Dallet, and B. Legal, Efficient phase noise modelling of a PLL-based frequency synthesizer, International Symposium on Communications, Control and Signal Processing, 2010.

Y. [. Lewis, S. Bornat, and . Renaud, Spiking Neural Network Hardware implementation : from single neurons to networks, NeuroComp'09, Conférence française de Neurosciences Computationnelles, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00986320