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B. 5. La, . B. Vhdlsyntax-fig, . La, and . B. Vhdlsyntax-fig, 24 ? Traduction des reshapes MARTE selon la syntaxe VHDL Comme le montre la figure B.23, le signal reshapecoordto_controller_coord est un tableau de 2 éléments traduisant un shape = 2 du port to_controller du coordinateur Le signal reshapecbfrom_coordinator_cb est de type de coordination_interface puisque le port from_coordinator du contrôleur ControllerB est de ce type. La figure B.24 illustre les port map de l'instance du coordinateur (coord à gauche) et celle du contrôleur ControllerB (cb à droite) utilisant respectivement les signaux reshapecoordto_controller_coord et reshapecbfrom_coordinator_cb de la figure B.23. Comme expliqué dans la figure 5.7, le «Reshape» entre le port to_controller du coordinateur coord et le port from_coordinator du contrôleur cb a comme tiler source qui a une origine égale à {1} Cette connexion est traduite en une instruction generate VHDL (GenerateStatement) comme le montre la partie inférieure de la figure B.24. Le nombre de répétitions gérées par cette instruction correspond au nombre de répétitions du port du côté du tiler source. Ici, il s'agit du port from_coordinator du contrôleur cb qui n'est pas répété (le port n'est pas stéréotypé «Shaped» et le contrôleur cb n'est pas répété non plus) La boucle for du generate commence à 0 et finit à 0 indiquant qu'il s'agit d'une seule répétition, Cela indique que le port from_coordinator du contrôleur cb est lié au deuxième élément du tableau représentant le port to_controller du coordinateur coord