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CMOS Integration of field effect plasmonic modulators

Abstract : Compact and low energy consumption integrated optical modulator is urgently required for encoding information into optical signals. To that respect, the use of plasmon modes to modulate light is of particular interest when compared to the numerous references describing silicon based optical modulators. Indeed, the high field confinement properties of those modes and the increased sensitivity to small refractive index changes of the dielectric close to the metal can help decrease the characteristic length scales of the devices, towards to that of microelectronics.This thesis investigates the realization of Si field-effect plasmonic modulator integrated with a silicon-on insulator waveguide (SOI-WG) using the standard CMOS technology. The material aspects and also the technological steps required in order to realize an integrated plasmonic modulator compatible with requirements of CMOS technology were investigated. First, we demonstrate a Metal-Nitride-Oxide-Semiconductor (MNOS) stack for applications in electro-optical plasmonic devices, so that a very low optical losses and reliable operation is achieved. This objective is met thanks to a careful choice of materials: (i) copper as a metal for supporting the plasmonic mode and (ii) stoechiometric silicon nitride as an ultrathin low optical loss diffusion barrier to the copper. Final electrical reliability is above 95% for a 3 nm thick Si3N4 layer, leakage current density below 10-8 and optical losses as low as 0.4 dB.μm-1 for a 13 nm thick insulator barrier, in agreement with the losses of the fundamental plasmonic mode estimated by 3D FDTD calculations, using the optical constant of Cu measured from ellipsometry. After demonstrating the MNOS as an appropriate structure for electro-optical CMOS plasmonics, we fabricate a vertical Metal-Insulator-Si-Metal (MISM) waveguide integrated with an SOI-WG, where the back metal was fabricated by flipping and molecular bonding of the original SOI wafer on a Si carrier wafer. The active device area varies from 0.5 to 3 μm2, 0.5 μm width and length varying from 1 to 6 μm.An efficient and simple way to couple light from Si-WG to vertical MISM PWG was experimentally realized by inserting a Metal-Insulator-Si-Insulator (MISI) coupling section between the two waveguides. We demonstrate that such couplers operates at 1.55 μm with the highest efficiency geometry corresponds to a compact length of 0.5 μm with coupling loss of just 2.5 dB (50 %) per facets. This value is 3 times smaller compared to the case of direct coupling (without any MISI section). High-k dielectrics are demonstrated as promising solution to reduce both the MISM absorption loss and the operation voltage. Given that interest, we experimental demonstrate an electrical reliable high-k stack for future applications to the MOS plasmonic modulators.A few μm long plasmonic modulator is experimentally investigated. Devices show leakage current below 10 fA through the copper electrodes based MOS capacitance. The accumulation capacitance (few fF) was found to scale with the surface of the device, in consistent with the expected equivalent oxide thickness of the MOS stack of our modulator. A low electro-absorption (EA) modulation showing capacitive behaviour was experimentally demonstrated in agreement with simulations. Finally, low energy consumption devices 6 fJ per bit was demonstrated.
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Submitted on : Thursday, July 25, 2013 - 2:32:13 PM
Last modification on : Friday, October 23, 2020 - 5:03:22 PM
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  • HAL Id : tel-00848107, version 1




Alexandros Emboras. CMOS Integration of field effect plasmonic modulators. Other. Université de Grenoble, 2012. English. ⟨NNT : 2012GRENT094⟩. ⟨tel-00848107⟩



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