.. Systemc-modeling, 52 4.5.1 Transaction level modeling, p.54

C. André and F. Mallet, Clock constraint specification language in UML, MARTE CCSL. Research Report, vol.6540, p.5, 2008.

C. André and F. Mallet, Mod??le de contraintes temporelles pour syst??mes polychrones, Journal Europ??en des Syst??mes Automatis??s, vol.43, issue.7-9, pp.43-50, 2009.
DOI : 10.3166/jesa.43.725-739

C. André, F. Mallet, R. , and S. , Modeling Time(s), MoDELS, pp.559-573, 2007.
DOI : 10.1007/978-3-540-75209-7_38

C. André, F. Mallet, R. , and S. , Embedded Systems Specification and Design Languages, volume 10 of LNEE, chapter Modeling of AADL data-communications with UML Marte, pp.150-170, 2008.

C. André, F. Mallet, R. Aamir-mehmood-khan, and S. , Modeling Spirit IP-XACT in UML Marte, Conf. on Design, Automation and Test in Europe (DATE), MARTE Workshop, pp.35-40, 2008.

F. [. André, M. Mallet, and . Peraldi-frati, A multiform time approach to real-time system modeling; Application to an automotive system, 2007 International Symposium on Industrial Embedded Systems, pp.234-241, 2007.
DOI : 10.1109/SIES.2007.4297340

]. C. And96 and . André, Representation and analysis of reactive behaviors: A synchronous approach, Computational Engineering in Systems Applications (CESA), pp.19-29, 1996.

C. André, Library of CCSL observers for CCSL, 2009.

C. André, Syntax and semantics of the clock constraint specification language (CCSL), Research Report, vol.6925, p.5, 2009.

[. Limited, AMBA Specification Rev 2.0, 1999.

[. Arpinen, E. Salminen, T. D. Hämäläinen, and M. Hännikäinen, Evaluating UML2 modeling of IP-XACT objects for automatic MP-SoC integration onto FPGA, 2009 Design, Automation & Test in Europe Conference & Exhibition, 2009.
DOI : 10.1109/DATE.2009.5090665

G. [. Benveniste and . Berry, The synchronous approach to reactive and real-time systems, Proceedings of the IEEE, vol.79, issue.9, pp.1270-1282, 1991.
DOI : 10.1109/5.97297

URL : https://hal.archives-ouvertes.fr/inria-00075115

[. Bombieri, N. Deganello, and F. Fummi, Integrating rtl ips into tlm designs through automatic transactor generation, DATE, pp.15-20, 2008.

[. Boussinot, R. De, and S. , The esterel language. another look at real time programming, Proceedings of the IEEE, pp.1293-1304, 1991.
URL : https://hal.archives-ouvertes.fr/inria-00075075

[. Berry, The Esterel Language Primer, version v5 91, Ecole des Mines de, 2000.

G. Berry, The foundations of Esterel, Proof, Language and Interaction: Essays in Honour of Robin Milner, 2000.

J. Bergeron, Writing Testbenches, Functional Verification of HDL Models, 2002.
DOI : 10.1007/978-1-4615-0302-6

[. Berry, SCADE: Synchronous Design and Validation of Embedded Control Software, Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems, pp.19-33, 2007.
DOI : 10.1007/978-1-4020-6254-4_2

[. Berry, M. Kishinevsky, and S. Singh, System level design and verification using a synchronous language, ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No.03CH37486), pp.433-440, 2003.
DOI : 10.1109/ICCAD.2003.159720

B. Bailey, G. Martin, and A. Piziali, ESL Design and Verification, A Prescription for Electronic System-Level Methodology, 2007.

]. B. Boe84 and . Boehm, Verifying and validating software requirements and design specifications, IEEE Softw, vol.1, issue.1, pp.75-88, 1984.

L. Cai and D. Gajski, Transaction level modeling: an overview, CODES+ISSS, pp.19-24, 2003.
DOI : 10.1109/codess.2003.1275250

P. Pong and . Chu, RTL Hardware Design Using VHDL: Coding for Efficiency, Portability , and Scalability, 2006.

]. Chen, M. Sgroi, L. Lavagno, G. Martin, A. Sangiovanni-vincentelli et al., UML and platform-based design. In UML for real: design of embedded real-time systems, pp.107-126, 2003.
DOI : 10.1007/0-306-48738-1_5

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.14.3851

[. Dømer, A. Gerstlauer, and D. Gajski, SpecC Language Reference Manual, Version 2.0. SpecC Technology Open Consortium, 2002.

P. Bruce and . Douglass, Real-Time UML. Developing efficient objects for embedded systems. Object technology, 1998.

. Dta-+-08-]-sébastien, F. Demathieu, C. Thomas, and . André, Sébastien Gérard, and François Terrier. First experiments using the UML profile for Marte, 11th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing, pp.50-57, 2008.

C. Erbas, System-Level Modeling and Design Space Exploration for Multiprocessor Embedded System-on-Chip Architectures, 2006.

D. Daniel and . Gajski, New strategies for system-level design, DDECS, p.15, 2007.

J. Gaisler, S. Habinc, and E. Catovic, GRLIB IP Library User's Manual, 2009.

[. Guiney and E. Leavitt, Transaction-level modeling with SystemC An introduction to OpenAccess: an open source data model and API for IC design, ASP- DAC, pp.434-436, 2005.

S. Graf, I. Ober, and I. Ober, A real-time profile for UML, International Journal on Software Tools for Technology Transfer, vol.42, issue.3, pp.113-127, 2006.
DOI : 10.1007/s10009-005-0213-x

[. Grotker, System Design with SystemC, 2002.

[. Halbwachs, Synchronous Programming of Reactive Systems, 1992.

D. Harel, Statecharts: a visual formalism for complex systems, Science of Computer Programming, vol.8, issue.3, pp.231-274, 1987.
DOI : 10.1016/0167-6423(87)90035-9

P. [. Halbwachs, P. Caspi, D. Raymond, and . Pilaud, The synchronous data flow programming language LUSTRE, Proceedings of the IEEE, vol.79, issue.9, pp.1305-1320, 1991.
DOI : 10.1109/5.97300

[. Halbwachs, F. Lagnier, and P. Raymond, Synchronous Observers and the Verification of Reactive Systems, AMAST '93: Proceedings of the Third International Conference on Methodology and Software Technology, pp.83-96, 1994.
DOI : 10.1007/978-1-4471-3227-1_8

D. Harel and A. Naamad, The STATEMATE semantics of statecharts, ACM Transactions on Software Engineering and Methodology, vol.5, issue.4
DOI : 10.1145/235321.235322

[. Henderson-sellers and C. Gonzalez-perez, Uses and Abuses of the Stereotype Mechanism in UML 1.x and 2.0, MoDELS, pp.16-26, 2006.
DOI : 10.1007/11880240_2

[. Ieee, IEEE Standard VHDL Language Reference Manual, IEEE Standard IEEE Std, 1076.

F. Jouault, F. Allilaire, J. Bézivin, I. Kurtev, and P. Valduriez, ATL, Companion to the 21st ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications , OOPSLA '06, pp.719-720, 2006.
DOI : 10.1145/1176617.1176691

URL : https://hal.archives-ouvertes.fr/hal-00448120

F. Jouault, F. Allilaire, J. Bézivin, and I. Kurtev, ATL: A model transformation tool, Science of Computer Programming, vol.72, issue.1-2, pp.31-39, 2008.
DOI : 10.1016/j.scico.2007.08.002

URL : https://hal.archives-ouvertes.fr/hal-00483363

A. Jantsch, Modeling Embedded Systems and SoC's: Concurrency and Time in Models of Computation, 2003.

[. Jcgm, Vocabulaire international de métrologie (VIM) ? Concepts fondamentaux et généraux et termes associés, Joint Committee for Guides in Metrology, 2008.

G. Anneke, J. Kleppe, W. Warmer, and . Bast, MDA Explained: The Model Driven Architecture: Practice and Promise, 2003.

L. Lamport, Time, clocks, and the ordering of events in a distributed system, Communications of the ACM, vol.21, issue.7, pp.558-565, 1978.
DOI : 10.1145/359545.359563

[. Guernic, M. L. Borgne, C. L. , and M. , Programming real-time applications with Signal, Proceedings of the IEEE, pp.1321-1336, 1991.
URL : https://hal.archives-ouvertes.fr/inria-00540460

[. Mallet and C. André, On the Semantics of UML/MARTE Clock Constraints, 2009 IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, pp.305-312
DOI : 10.1109/ISORC.2009.27

URL : https://hal.archives-ouvertes.fr/inria-00383279

[. Mallet, C. André, and J. Deantoni, Executing AADL Models with UML/MARTE, 2009 14th IEEE International Conference on Engineering of Complex Computer Systems, pp.371-376, 2009.
DOI : 10.1109/ICECCS.2009.10

URL : https://hal.archives-ouvertes.fr/inria-00416592

[. Mallet, Clock constraint specification language: specifying clock constraints with UML/MARTE, Innovations in Systems and Software Engineering, pp.309-314, 2008.
DOI : 10.1007/s11334-008-0055-2

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.232.5738

[. Mallet, R. De-simone, and . Marte, AADL for Discrete-Event and Discrete-Time Domains, LNEE, vol.36, issue.2, pp.27-41
URL : https://hal.archives-ouvertes.fr/inria-00416656

T. Mens and P. Van-gorp, A Taxonomy of Model Transformation, Electronic Notes in Theoretical Computer Science, vol.152, pp.125-142, 2006.
DOI : 10.1016/j.entcs.2005.10.021

[. Martin and W. Mueller, UML for SoC Design [MPA09] Frédéric Mallet, Marie-Agnès Peraldi-Frati, and Charles André. Marte CCSL to execute East-ADL timing requirements, ISORC [IEE09], pp.249-253, 2005.

[. Medvidovic and R. N. Taylor, A classification and comparison framework for software architecture description languages, IEEE Transactions on Software Engineering, vol.26, issue.1, pp.70-93, 2000.
DOI : 10.1109/32.825767

URL : https://hal.archives-ouvertes.fr/hal-00444077

[. Omg, UML 2.0 OCL Specification. Object Management Group, pp.3-10, 2003.

[. Omg, UML Profile for Schedulability, Performance, and Time Specification Object Management Group, Object Management Group, Inc., 492 Old Connecticut Path, Framing-ham, MA 01701, pp.5-6, 2005.

[. Omg, UML profile for System on a Chip v1.0.1. Object Management Group, OMG document number, pp.6-08, 2006.

[. Omg, Unified Modeling Language, Superstructure. Object Management Group Version 2.1.2 formal, pp.2007-2018, 2007.

]. Omg08a and . Omg, Meta Object Facility (MOF) 2.0 Query/View/Transformation Specification, v1.0. Object Management Group, 2008.

]. Omg08b and . Omg, Systems Modeling Language (SysML) Specification 1.1. Object Management Group, pp.8-13, 2008.

]. Omg08c, . Omg, and M. Uml-profile-for, Object Management Group OMG document number, pp.8-14, 2008.

]. Omg09b, . Omg, . Uml, and . Superstructure, Object Management Group, pp.2009-2011, 2009.

S. Revol, Profil UML pour TLM: contributionàcontributionà la formalisation etàetà l'automatisation du flot de conception et vérification des systèmes sur puce, 2008.

P. [. Riccobene, A. Scandurra, S. Rosti, and . Bocchio, A SoC Design Methodology Involving a UML 2.0 Profile for SystemC, Design, Automation and Test in Europe, 2005.
DOI : 10.1109/DATE.2005.37

URL : https://hal.archives-ouvertes.fr/hal-00181192

S. Revol, S. Taha, F. Terrier, A. Clouard, S. Gérard et al., Unifying HW Analysis and SoC Design Flows by Bridging Two Key Standards: UML and IP-XACT, Distributed Embedded Systems: Design, Middleware and Resources, pp.69-78, 2008.
DOI : 10.1007/978-0-387-09661-2_7

K. Schubert, Improvements in functional simulation addressing challenges in large, distributed industry projects, DAC '03: Proceedings of the 40th annual Design Automation Conference, pp.11-14, 2003.

T. Schattkowsky, UML 2.0 - Overview and Perspectives in SoC Design, Design, Automation and Test in Europe, pp.832-833, 2005.
DOI : 10.1109/DATE.2005.320

URL : https://hal.archives-ouvertes.fr/hal-00181220

[. Selic, Tutorial: real-time object-oriented modeling (ROOM), Proceedings Real-Time Technology and Applications, p.214, 1996.
DOI : 10.1109/RTTAS.1996.509538

[. Selic, Using UML for modeling complex real-time systems, LCTES, pp.250-260, 1998.
DOI : 10.1007/BFb0057795

[. Selic, On software platforms, their modeling with uml 2, and platformindependent design. Object-Oriented Real-Time Distributed Computing, IEEE International Symposium on, vol.0, pp.15-21, 2005.

[. Selic, Model-Driven Development: Its Essence and Opportunities, Ninth IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC'06), pp.313-319, 2006.
DOI : 10.1109/ISORC.2006.54

[. Selic, A Systematic Approach to Domain-Specific Language Design Using UML, 10th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC'07), pp.2-9, 2007.
DOI : 10.1109/ISORC.2007.10

. Spi08, . Spirit, and . Ip-xact-v1, 4: A specification for XML meta-data and tool interfaces. Spirit Consortium, 2008.

H. Schlebusch, G. Smith, D. Sciuto, D. Gajski, C. Mielenz et al., Transaction based design: another buzzword or the solution to a design problem?, 2003 Design, Automation and Test in Europe Conference and Exhibition, pp.10876-10879, 2003.
DOI : 10.1109/DATE.2003.1253716

[. Sangiovanni-vincentelli, L. Carloni, F. D. Bernardinis, and M. Sgroi, Benefits and challenges for platform-based design, Proceedings of the 41st annual conference on Design automation , DAC '04, pp.409-414, 2004.
DOI : 10.1145/996566.996684

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.387.876

[. Schattkowsky, T. Xie, and W. Mueller, A UML front-end for IP- XACT-based IP management, Conf. on Design, Automation and Test in Europe, 2009.

[. Vanderperren, W. Mueller, and W. Dehaene, UML for Electronic Systems Design: A Comprehensive Overview. Design Automation for Embedded Systems, pp.261-292, 2008.
DOI : 10.1007/s10617-008-9028-9

A. Viehl, T. Schönwald, O. Bringmann, and W. Rosenstiel, Formal Performance Analysis and Simulation of UML/SysML Models for ESL Design, Proceedings of the Design Automation & Test in Europe Conference, pp.242-247, 2006.
DOI : 10.1109/DATE.2006.244110

T. Weilkiens, Systems Engineering with SysML/UML: Modeling, Analysis, Design. The MK, 2008.

T. Weigert, D. Garlan, J. Knapman, B. Møller-pedersen, and B. Selic, Modeling of architectures with uml (panel), Lecture Notes in Computer Science, pp.556-569, 1939.

]. J. Zbg-+-08, O. Zimmermann, J. Bringmann, F. Gerlach, U. Schaefer et al., Holistic system modeling and refinement of interconnected microelectronics systems, Conf. on Design, Automation and Test in Europe (DATE), MARTE Workshop, 2008.