Multilevel MPSoC Performance Evaluation Using MDE Approach, Systemon-Chip , 2006. International Symposium on, pp.1-4, 2006. ,
Partitioning and CoDesign tools & methodology for Reconfigurable Computing : The EPICURE philosophy, International Workshop on Systems, Architectures, Modeling, and Simulation (SA- MOS'03), p.6, 2003. ,
URL : https://hal.archives-ouvertes.fr/hal-00106323
UNISIM: An Open Simulation Environment and Library for Complex Architecture Design and Collaborative Development, IEEE Computer Architecture Letters, vol.6, issue.2, pp.45-48, 2007. ,
DOI : 10.1109/L-CA.2007.12
Hellfire: A design framework for critical embedded systems' applications, 2010 11th International Symposium on Quality Electronic Design (ISQED), pp.730-737, 2010. ,
DOI : 10.1109/ISQED.2010.5450495
Platform designer : An approach for modeling multiprocessor platforms based on SystemC. Design Automation for Embedded Systems Journal, pp.253-283, 2005. ,
Shared-memory mutual exclusion: major research trends since 1986, Distributed Computing, vol.16, issue.2-3, pp.75-110, 2003. ,
DOI : 10.1007/s00446-003-0088-6
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.138.1589
Creating Multiprocessor Nios II Systems, ver. 1.3, 2007. ,
HThreads : A Hardware/Software Co-Designed Multithreaded RTOS Kernel. Emerging Technologies and Factory Automation, ETFA 2005, pp.338-346, 2005. ,
Achieving Programming Model Abstractions for Reconfigurable Computing. Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol.16, issue.1, pp.34-44, 2008. ,
Animate Vision, Artificial Intelligence, vol.48, pp.57-86, 1991. ,
Interprocess Communication and Synchronization based on Message Passing, 1995. ,
SystemC Cosimulation and Emulation of Multiprocessor SoC Designs, IEEE Computer, vol.36, issue.4, pp.53-59, 2003. ,
The Esterel synchronous programming language: design, semantics, implementation, Science of Computer Programming, vol.19, issue.2, pp.87-152, 1992. ,
DOI : 10.1016/0167-6423(92)90005-V
URL : https://hal.archives-ouvertes.fr/inria-00075711
Configware and morphware going mainstream, Journal of Systems Architecture, vol.49, issue.4-6, pp.127-142, 2003. ,
DOI : 10.1016/S1383-7621(03)00073-0
Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, Int. Journal in Computer Simulation, vol.4, issue.2, p.0, 1994. ,
DOI : 10.1016/B978-155860702-6/50048-X
A survey of research and practices of Network-on-chip, ACM Computing Surveys, vol.38, issue.1, 2006. ,
DOI : 10.1145/1132952.1132953
Implementing remote procedure calls, ACM Trans. Comput. Syst, vol.2, issue.1, pp.39-59, 1984. ,
Language extensions to SystemC, Proceedings of the 44th annual conference on Design automation, DAC '07, pp.35-38, 2007. ,
DOI : 10.1145/1278480.1278490
Metropolis: an integrated electronic system design environment, Computer, vol.36, issue.4, pp.45-52, 2003. ,
DOI : 10.1109/MC.2003.1193228
Spécification et conception des systèmes : une méthodologie, Editions Masson, 1990. ,
SPACE: A Hardware/Software SystemC Modeling Platform Including an RTOS, Forum on Design Languages(FDL'03), 2003. ,
DOI : 10.1007/1-4020-7991-5_6
Languages for System Specification, chapter SPACE : a hardware/software SystemC modeling platform including an RTOS, pp.91-104, 2004. ,
SPACE : a hardware/software SystemC modeling platform including an RTOS. Languages for system specification : Selected contributions on UML, SystemC, System Verilog , mixed-signal systems, and property specification from FDL'03, pp.91-104, 2004. ,
IPSIM: systemc 3.0 enhancements for communication refinement, 2003 Design, Automation and Test in Europe Conference and Exhibition, p.20106, 2003. ,
DOI : 10.1109/DATE.2003.1253814
Modeling and Simulation in Scilab, ScicOS, 2006. ,
Transaction Level Modeling : an Overview, CODES+ISSS '03 : Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, pp.19-24, 2003. ,
Transaction-level modeling in system level design. CECS technical report (03-10), 2003. ,
Multilanguage design of heterogeneous systems, Proceedings of the seventh international workshop on Hardware/software codesign , CODES '99, pp.54-58, 1999. ,
DOI : 10.1145/301177.301206
URL : https://hal.archives-ouvertes.fr/hal-00008102
RTEMS open-source Operating System, the Real-Time Executive for Multiprocessor Systems ,
AMBA Specification Revision 2.0, 1999. ,
CoWare SystemC IP TLM Model Library and Virtual Platform Designer tool ,
Layered, multi-threaded, high-level performance design, 2003 Design, Automation and Test in Europe Conference and Exhibition, p.10954, 2003. ,
DOI : 10.1109/DATE.2003.1253728
Parallel Computer Architecture : A Hardware/Software Approach, The Morgan Kaufmann Series in Computer Architecture and Design, 1998. ,
A Next-Generation Design Framework for Platform-based Design, 2007. ,
System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design, EURASIP Journal on Embedded Systems, vol.4, issue.2, pp.1-5, 2008. ,
DOI : 10.1109/TVLSI.2007.915390
Bridging MoCs in SystemC Specifications of Heterogeneous Systems, EURASIP Journal on Embedded Systems, pp.1-16, 2008. ,
Cooperating Sequential Processes The Netherlands ., sept 1965 Reprinted in Programming Languages, F. genuys, 1968. ,
System Design for DSP Applications in Transaction Level Modeling Paradigm, DAC '04 : Proceedings of the 41st annual Design Automation Conference, pp.466-471, 2004. ,
COSYN, Proceedings of the 34th annual conference on Design automation conference , DAC '97, pp.703-708, 1997. ,
DOI : 10.1145/266021.266341
OpenMP: an industry standard API for shared-memory programming, IEEE Computational Science and Engineering, vol.5, issue.1, pp.46-55, 1998. ,
DOI : 10.1109/99.660313
Transaction level modeling, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis , CODES+ISSS '04, pp.75-80, 2004. ,
DOI : 10.1145/1016720.1016742
Opportunities for Operating Systems Research in Reconfigurable Computing, 1999. ,
CAL Language Report Specification of the CAL Actor Language, 2003. ,
Design of embedded systems: formal models, validation, and synthesis, Proceedings of the IEEE, vol.85, issue.3, pp.366-390, 1997. ,
DOI : 10.1109/5.558710
A framework for system-level modeling and simulation of embedded systems architectures, EURASIP Jnl. of Embedded System, issue.1, pp.2-2, 2007. ,
High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping, 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping, pp.27-33, 2008. ,
DOI : 10.1109/RSP.2008.25
Modeling time in computing, ACM Computing Surveys, vol.42, issue.2, pp.1-59, 2010. ,
DOI : 10.1145/1667062.1667063
A Timing-Accurate Modeling and Simulation Environment for Networked Embedded Systems, pp.42-47, 2003. ,
Transaction-Level Modeling with Systemc : TLM Concepts and Applications for Embedded Systems, 2006. ,
DOI : 10.1007/b137175
Verification of an industrial SystemC/TLM model using LOTOS and CADP. In Formal Methods and Models for Co-Design, 2009. MEMOCO- DE'09, 7th IEEE/ACM International Conference on, pp.46-55, 2009. ,
URL : https://hal.archives-ouvertes.fr/inria-00408283
The visual homing problem : an example of robotics/biology cross fertilization, Robotics and Autonomous Systems, vol.30, pp.155-180, 2000. ,
Guest Editor's Introduction : New VLSI Tools, IEEE Computer, vol.16, issue.12, pp.11-14, 1983. ,
System Design with SystemC, 2002. ,
Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors, Proceedings of the seventh international workshop on Hardware/software codesign , CODES '99, 1999. ,
DOI : 10.1145/301177.301489
Methods for evaluating and covering the design space during early design development, Integration, the VLSI Journal, vol.38, issue.2, pp.131-183, 2004. ,
DOI : 10.1016/S0167-9260(04)00032-X
Modeling Software with SystemC 3.0. 6th European SystemC Users Group Presentations, 2002. ,
System-Level Communication Modeling for Network-on-Chip Synthesis, Proceedings of the 2005 Asia and South Pacific Design Automation Conference , ASP-DAC '05, pp.45-48, 2005. ,
SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.6, issue.1, pp.84-100, 1998. ,
DOI : 10.1109/92.661251
RTOS modeling for system level design, 2003 Design, Automation and Test in Europe Conference and Exhibition, pp.10130-10136, 2003. ,
DOI : 10.1109/DATE.2003.1253598
Automatic Generation and Targeting of Application Specific Operating Systems and Embedded Systems Software, Proceedings of the conference on Design, Automation and Test in Europe (DATE), pp.679-685, 2001. ,
URL : https://hal.archives-ouvertes.fr/hal-00008084
SpecC : Specification Language and Methodology, 2000. ,
Cycle-approximate Retargetable Performance Estimation at the Transaction Level, Design Automation and Test in Europe DATE '08, pp.3-8, 2008. ,
A decade of reconfigurable computing: a visionary retrospective, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, pp.642-649, 2001. ,
DOI : 10.1109/DATE.2001.915091
A system Level Modeling Methodology for RTOS Centric Embedded Systems, 2006. ,
Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems, Forum on specification and Design Languages, 2004. ,
An Integrated SystemC Framework for Real-Time Scheduling Assessments In System Level, The 25th IEEE International Real-Time Systems Symposium (RTSS'04), 2004. ,
Programming and verifying real-time systems by means of the synchronous data-flow language LUSTRE, IEEE Transactions on Software Engineering, vol.18, issue.9, pp.785-793, 1992. ,
DOI : 10.1109/32.159839
Transactional memory, ACM SIGARCH Computer Architecture News, vol.21, issue.2, pp.289-300, 1993. ,
DOI : 10.1145/173682.165164
Timed RTOS Modeling for Embedded System Design, IEEE Real Time on Embedded Technology and Applications Symposium (RTAS'05), pp.448-457, 2005. ,
High Level RTOS Scheduler Modeling for a Fast Design Validation, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07), pp.461-466, 2007. ,
DOI : 10.1109/ISVLSI.2007.49
The STATEMATE semantics of statecharts, ACM Transactions on Software Engineering and Methodology, vol.5, issue.4, pp.293-333, 1996. ,
DOI : 10.1145/235321.235322
Communicating sequential processes, Communications of the ACM, vol.21, issue.8, pp.666-677, 1978. ,
DOI : 10.1145/359576.359585
A SystemC simulation modeling approach for allocating task precedence graphs to multiprocessors, 2007 7th International Conference on ASIC, pp.1205-1208, 2007. ,
DOI : 10.1109/ICASIC.2007.4415851
Abstract RTOS Modeling for Embedded Systems, IEEE International Workshop on Rapid System Prototyping, pp.210-216, 2004. ,
Scheduling Refinement in Abstract RTOS Models, ACM Transactions on Embedded Computing Systems, vol.5, issue.2, pp.342-354, 2006. ,
Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support, Analysis, Architectures and Modelling of Embedded Systems IFIP Advances in Information and Communication Technology, pp.66-76, 2009. ,
DOI : 10.1007/978-1-4615-4515-6
RTK- Spec TRON : a simulation model of an ITRON based RTOS kernel in SystemC, Design, Automation and Test in Europe, 2005. Proceedings, pp.554-559, 2005. ,
Virtual Prototyping of T-Engine Systems Using RTOS Centric Co-Simulation in Systemc, Information and Communications Technology, 2005. Enabling Technologies for the New Knowledge Society : ITI 3rd International Conference on, pp.171-191, 2005. ,
RTOS-centric hardware/software cosimulator for embedded system design, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis , CODES+ISSS '04, pp.158-163, 2004. ,
DOI : 10.1145/1016720.1016760
Hardware/Software Co- Design of Run-Time Schedulers for Real-Time Systems. Design Automation for Embedded Systems, pp.89-144, 2000. ,
Rapport 2009 -System Drivers, 2009. ,
System-of-Systems Engineering -a Definition, IEEE International Conference on system, Mana and Cybernetics (IEEE SMC'05), 2005. ,
Models of Embedded Computation, Embedded Systems Handbook, 2005. ,
DOI : 10.1201/9781420038163.ch4
Programming models and HW-SW interfaces abstraction for multi-processor SoC, pp.280-285, 2006. ,
Models of computation and languages for embedded system design, IEE Proceedings - Computers and Digital Techniques, vol.152, issue.2, pp.114-129, 2005. ,
DOI : 10.1049/ip-cdt:20045098
Multiprocessor Systems-on-Chips, chapter The What, Why, and How of MPSoCs, pp.1-18, 2004. ,
The Semantics of a Simple Language for Parallel Programming, Information Processing '74 : Proceedings of the IFIP Congress, pp.471-475, 1974. ,
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs, Third International Workshop on Computer Systems : Architectures, Modeling, and SimulationSAMOS'03), pp.138-148, 2004. ,
DOI : 10.1007/978-3-540-27776-7_15
Combination of instruction set simulation and abstract RTOS model execution for fast and accurate target software evaluation, Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis, CODES/ISSS '08, pp.143-148, 2008. ,
DOI : 10.1145/1450135.1450168
Hardware support for real-time operating systems, Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis , CODES+ISSS '03, pp.45-51, 2003. ,
DOI : 10.1145/944654.944656
System-level design: orthogonalization of concerns and platform-based design, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.19, issue.12, pp.1523-1543, 2000. ,
DOI : 10.1109/43.898830
A Configurable Hardware Scheduler for Real-time Systems, Engineering of Reconfigurable Systems and Algorithms (ERSA), pp.96-101, 2003. ,
Analyzing on-chip communication in a MPSoC environment, Proceedings Design, Automation and Test in Europe Conference and Exhibition, p.20752, 2004. ,
DOI : 10.1109/DATE.2004.1268966
An industrial perspective : A pragmatic high end signal processing design environment at Thales, SAMOS-III, Computer Systems : Architectures, Modeling, and Simulation, p.145, 2003. ,
Synchronization Mechanisms on Modern Multi-core Architectures, pp.290-303, 2007. ,
DOI : 10.1007/978-3-540-74309-5_28
From Navigation to Active Object Recognition, Proceedings of the Sixth International Conference on Simulation for Adaptive Behavior (SAB), pp.266-275, 2000. ,
SimpleScalar instruction set simulators ,
Synchronous Data Flown, Proceedings of the IEEE, pp.1235-1245, 1987. ,
A comparison of the RTU hardware RTOS with a hardware/software RTOS, Proceedings of the 2003 conference on Asia South Pacific design automation , ASPDAC, pp.683-688, 2003. ,
DOI : 10.1145/1119772.1119925
ReconOS: An RTOS Supporting Hard-and Software Threads, 2007 International Conference on Field Programmable Logic and Applications, pp.441-446, 2007. ,
DOI : 10.1109/FPL.2007.4380686
A portable abstraction layer for hardware threads, 2008 International Conference on Field Programmable Logic and Applications, pp.17-22, 2008. ,
DOI : 10.1109/FPL.2008.4629901
Semaphore Queue Priority Assignment for Real-Time Multiprocessor Synchronization. Software engineering, 1995. ,
A Framework for Comparing Models of Computation, IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems, vol.17, issue.12, pp.1217-1229, 1998. ,
The Rising Wave of Field Programmability(keynote) In Field-Programmable Logic and Applications, The Roadmap to Reconfigurable Computing, 10th International Workshop (FPL'OO), pp.1-6 ,
Modélisation et simulation basée sur SystemC des systèmes monopuces au niveau transactionnel pour l'évaluation de performances, 2005. ,
Design Space Exploration for Dynamically Reconfigurable Architectures, Design, Automation and Test in Europe, pp.366-371, 2005. ,
DOI : 10.1109/DATE.2005.118
URL : https://hal.archives-ouvertes.fr/hal-00181542
Perception as a Dynamical Sensori-Motor Attraction Basin, Advances in Artificial Life (8th European Conference, ECAL), volume LNAI 3630 of Lecture Note in Artificial Intelligence, pp.37-46, 2005. ,
DOI : 10.1007/11553090_5
Developing architectural platforms: a disciplined approach, IEEE Design & Test of Computers, vol.19, issue.6, pp.6-16, 2002. ,
DOI : 10.1109/MDT.2002.1047739
Design of a Hardware Multiprocessor Real-Time Operating System, DATE University Booth (DA- TE'03), 2007. ,
URL : https://hal.archives-ouvertes.fr/hal-00525314
Rapid system-level performance evaluation and optimization for application mapping onto SoC architectures, 15th Annual IEEE International ASIC/SOC Conference, 2002. ,
DOI : 10.1109/ASIC.2002.1158049
A generic RTOS model for real-time systems simulation with systemC, Proceedings Design, Automation and Test in Europe Conference and Exhibition, pp.30082-30087, 2004. ,
DOI : 10.1109/DATE.2004.1269211
Speculative synchronization : applying thread-level speculation to explicitly parallel applications, SIGOPS Oper. Syst. Rev, vol.36, pp.18-29, 2002. ,
the real-time kernel. CMP Media, 2002. ,
Operating System based software generation for Systems-on-Chip, Proceedings of the 37th Conference on Design Automation (DAC'00), pp.396-401, 2000. ,
Abstract RTOS modeling for multiprocessor system-on-chip, Proceedings. 2003 International Symposium on System-on-Chip (IEEE Cat. No.03EX748), pp.147-150, 2003. ,
DOI : 10.1109/ISSOC.2003.1267741
ARTS : A SystemCbased framework for multiprocessor Systems-on-Chip modelling. Design Automation for Embedded Systems, pp.285-311, 1007. ,
Designing an Operating System for a Heterogeneous Reconfigurable SoC, International Parallel and Distributed Processing Symposium (IPDPS), p.174, 2003. ,
Spécification et validation des systèmes hétérogènes embarqués, 2002. ,
A Safari Through the MPSoC Run-Time Management Jungle, Journal of Signal Processing Systems, vol.11, issue.3, pp.251-268, 1007. ,
DOI : 10.1007/s11265-008-0305-4
A practical approach for bus architecture optimization at transaction level, 2003 Design, Automation and Test in Europe Conference and Exhibition, pp.176-181, 2003. ,
DOI : 10.1109/DATE.2003.1253825
Open Core Protocol International Partnership (OCP-IP ). available at : http ,
OMG Model Driven Architecture ,
Unified Modeling Language. available at :www.uml.org ,
Systems Modeling Language (SysML) Specification. OMG document : ad, 2006. ,
Parallel programming with MPI, 1996. ,
POSIX modeling in SystemC, Asia and South Pacific Design Automation Conference (ASP-DAC'06), pp.485-490, 2006. ,
RTOS modeling in SystemC for real-time embedded SW simulation : A POSIX model. Design Automation for Embedded Systems, pp.209-227, 2005. ,
Schedulers as model-based design elements in programmable heterogeneous multiprocessors, Proceedings of the 40th conference on Design automation , DAC '03, pp.408-411, 2003. ,
DOI : 10.1145/775832.775938
Extending the transaction level modeling approach for fast communication architecture exploration, Proceedings of the 41st annual conference on Design automation , DAC '04, pp.113-118, 2004. ,
DOI : 10.1145/996566.996603
Computer Organization and Design : The Hardware/software Interface, 1997. ,
SCope : SoC Co-simulation and Performance Estimation in SystemC, IEEE/ACM Design, Automation and Test in Europe, 2007. ,
A rule-based model of computation for SystemC : integrating SystemC and Bluespec for co-design. In Formal Methods and Models for Co-Design, MEMO- CODE'06. Proceedings. Fourth ACM and IEEE International Conference on, pp.39-48, 2006. ,
Real-Time Operating System modeling in SystemC for HW/SW co-simulation, DCIS'05 : XX Conference on Design of Circuits and Integrated Systems, 2005. ,
Transactional lock-free execution of lock-based programs, pp.5-17, 2002. ,
Instruction set compiled simulation, Proceedings of the 40th conference on Design automation , DAC '03, pp.758-763, 2003. ,
DOI : 10.1145/775832.776026
Applications and Extensions of SADT, IEEE Computer, vol.18, issue.4, pp.25-34, 1985. ,
MARTE : A New OMG Profile RFP for the Modeling and Analysis of Real-Time Embedded Systems, DAC 2005 Workshop UML for SoC Design, UML-SoC'05, 2005. ,
OSCI White paper : Transaction Level Modeling in SystemC ,
Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling, Design, Automation and Test in Europe, pp.122-127, 2008. ,
Abstract, Multifaceted Modeling of Embedded Processors for System Level Design, 2007 Asia and South Pacific Design Automation Conference, pp.384-389, 2007. ,
DOI : 10.1109/ASPDAC.2007.358016
Automatic generation of hardware dependent software for MPSoCs from abstract system specifications, 2008 Asia and South Pacific Design Automation Conference, pp.271-276, 2008. ,
DOI : 10.1109/ASPDAC.2008.4483954
Modeling Real-Time Systems ??? Challenges and Work Directions, EMSOFT '01 : Proceedings of the First International Workshop on Embedded Software, pp.373-389, 2001. ,
DOI : 10.1007/3-540-45449-7_26
A Framework for Component-based Construction Extended Abstract, SEFM '05 : Proceedings of the Third IEEE International Conference on Software Engineering and Formal Methods, pp.293-300, 2005. ,
Formal models for embedded system design, IEEE Design & Test of Computers, vol.17, issue.2, pp.14-27, 2000. ,
DOI : 10.1109/54.844330
Massively Parallel Systems with Real Time Constraints, the Algorithm Architecture Adequation Methodology, Proceedings of Conference on Massively Parallel Computing Systems, MPCS'94, 1994. ,
Phasers, Proceedings of the 22nd annual international conference on Supercomputing , ICS '08, pp.277-288, 2008. ,
DOI : 10.1145/1375527.1375568
RPC : Remote Procedure Call Protocol Specification Version 2, Request for Comments : 1831. available at : http, 1995. ,
Embedded Software Development in a System-Level Design Flow, Embedded System Design : Topics, Techniques and Trends IFIP Advances in Information and Communication Technology, pp.289-298, 2007. ,
DOI : 10.1007/978-0-387-72258-0_25
Models and Languages for Parallel Computation, ACM Computing Surveys, vol.30, pp.123-169, 1998. ,
Platform-based design and software design methodology for embedded systems, IEEE Design & Test of Computers, vol.18, issue.6, pp.23-33, 2001. ,
DOI : 10.1109/54.970421
Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks, IEEE Transactions on Computers, vol.53, issue.11, pp.1393-1407, 2004. ,
DOI : 10.1109/TC.2004.99
Modeling Fixed-Priority Preemptive Multi-Task Systems in SpecC, Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), pp.93-100, 2001. ,
Structured Computer Organization, 1998. ,
Technology and business : forces driving microprocessor evolution, Proceedings of the IEEE, pp.1641-1652, 1995. ,
Projet Européen MORPHEUS (Multi-purpOse dynamically Reconfigurable Platform for intensive HEterogeneoUS processing) ,
On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities, Field Programmable Logic and its Applications (FPL), number 3203 in Lecture Notes in Computer Science, pp.454-463, 2004. ,
DOI : 10.1007/978-3-540-30117-2_47
Intel Virtualization Technology, IEEE Computer Journal, vol.38, issue.5, pp.48-56, 2005. ,
Platform tuning for embedded systems design, Computer, vol.34, issue.3, pp.112-114, 2001. ,
DOI : 10.1109/2.901171
The Molen Programming Paradigm, International Workshop on Systems, Architectures, Modeling, and Simulation (SAMOS'03), p.6, 2003. ,
DOI : 10.1007/978-3-540-27776-7_1
Using High-Level RTOS Models for HW/SW Embedded Architecture Exploration: Case Study on Mobile Robotic Vision, EURASIP Journal on Embedded Systems, vol.85, issue.3, p.17, 2008. ,
DOI : 10.1016/S0010-0277(98)00069-9
URL : https://hal.archives-ouvertes.fr/hal-00524580
RTOS Scheduler Implementation in Hardware and Software for Real Time Applications, Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06), pp.163-168, 2006. ,
DOI : 10.1109/RSP.2006.34
A New Paradigm and Associated Tools for TLM/T Modeling of MPSoCs, 2006 Ph.D. Research in Microelectronics and Electronics, pp.217-220, 2006. ,
DOI : 10.1109/RME.2006.1689935
URL : https://hal.archives-ouvertes.fr/hal-01338245
Reconfigurable Hardware Operating Systems : From Design Concepts to Realizations, Engineering of Reconfigurable Systems and Algorithms (ERSA'03), pp.284-287, 2003. ,
Prioritized Interprocessor Synchronization in an ITRON-MP Implementation, p.48, 1996. ,
Virtex 5 familly overview ,
Embedded software generation from system level design languages, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753), pp.463-468, 2004. ,
DOI : 10.1109/ASPDAC.2004.1337620
RTOS scheduling in transaction level models, Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis , CODES+ISSS '03, pp.31-36, 2003. ,
DOI : 10.1145/944645.944653
Reduce SW/HW Migration Efforts by a RTOS in Multi-FPGA Systems, CSCWD, pp.636-645, 2005. ,
DOI : 10.1007/11686699_64
Accurate RTOS Modeling and Analysis with??SystemC, Hardware-dependent Software, pp.233-260 ,
DOI : 10.1007/978-1-4020-9436-1_9