Atomistic analysis of the evolution of boron activation during annealing in crystalline and preamorphized silicon, Journal of Applied Physics, vol.97, issue.10, p.103520, 2005. ,
DOI : 10.1063/1.1904159
Physical insight into boron activation and redistribution during annealing after low-temperature solid phase epitaxial regrowth, Applied Physics Letters, vol.88, issue.19, p.191917, 2006. ,
DOI : 10.1063/1.2203334
Boron diffusion and activation in SOI and bulk Si: The role of the buried interface, Physics Research Section B: Beam Interactions with Materials and Atoms, pp.152-156, 2007. ,
DOI : 10.1016/j.nimb.2006.12.157
Kinetics of large B clusters in crystalline and preamorphized silicon, Journal of Applied Physics, vol.110, issue.7, p.73524, 2011. ,
DOI : 10.1063/1.3639280
Enabling 3D Monolithic Integration, ECS Transactions, vol.16, pp.47-54, 2008. ,
GeOI and SOI 3D monolithic cell integrations for high density applications, Proceedings of the 2009 VLSI Technology Symposiumin, pp.166-167, 2009. ,
Advances in 3D CMOS sequential integration, Proceedings of the 2009 International Electron Devices Meeting, pp.1-4, 2009. ,
Demonstration of low temperature 3D sequential FDSOI integration down to 50 nm gate length, Proceedings of the 2011 VLSI Technology Symposium, pp.158-159, 2011. ,
Advances, challenges and opportunities in 3D CMOS sequential integration, Proceedings of the 2011 International Electron Devices Meeting, 2011. ,
Modeling of the effect of the buried Si???SiO2 interface on transient enhanced boron diffusion in silicon on insulator, Journal of Applied Physics, vol.107, issue.7, pp.74503-074503, 2010. ,
DOI : 10.1063/1.3369160
Characterization and modeling of capacitances in FD-SOI devices, Proceedings of the 2011 International Conference on Ultimate Integration of Silicon, pp.1-4, 2011. ,
Characterization and modeling of capacitances in FD-SOI devices, Solid-State Electronics, vol.71, pp.53-57, 2012. ,
DOI : 10.1016/j.sse.2011.10.020
Modelling of gate-induced drain leakage in relation to technological parameters and temperature Microelectronics Reliability The impact of gate-induced drain leakage current on MOSFET scaling, Proceedings of the 1987 International Electron Devices Meeting, pp.649-652, 1987. ,
Mechanisms of interface trap-induced drain leakage current in off-state n-MOSFET's, IEEE Transactions on Electron Devices, vol.42, issue.4, pp.738-743, 1995. ,
DOI : 10.1109/16.372079
Subbreakdown drain leakage current in MOSFET, IEEE Electron Device Letters, vol.8, issue.11, pp.515-517, 1987. ,
DOI : 10.1109/EDL.1987.26713
Interface trap-enhanced gate-induced leakage current in MOSFET, IEEE Electron Device Letters, vol.10, issue.5, pp.216-218, 1989. ,
DOI : 10.1109/55.31725
An analytic three-terminal band-to-band tunneling model on GIDL in MOSFET, IEEE Transactions on Electron Devices, vol.48, issue.7, pp.1400-1405, 2001. ,
DOI : 10.1109/16.930658
Scaling Three-Dimensional SOI Integrated-Circuit Technology, 2007 IEEE International SOI Conference, 2007. ,
DOI : 10.1109/SOI.2007.4357865
Displacement criterion for amorphization of silicon during ion implantation, Journal of Applied Physics, vol.52, issue.12, pp.7143-7146, 1981. ,
DOI : 10.1063/1.328688
Transient Enhanced Diffusion of Dopants in Preamorphised Si Layers, MRS Proceedings, 1996. ,
Thermal evolution of interstitial defects in implanted silicon, Ion Implantation Technology. 2002. Proceedings of the 14th International Conference on, pp.538-543, 2002. ,
DOI : 10.1109/IIT.2002.1258061
Extended defects in shallow implants, Appl. Phys. A, vol.76, pp.1025-1033, 2003. ,
Current understanding and modeling of B diffusion and activation anomalies in preamorphized ultra-shallow junctions Electrical deactivation and diffusion of boron in preamorphized ultrashallow junctions: interstitial transport and F co-implant control, Mat. Res. Soc. Symp. Proc. 810 C3.6.1 Proceedings of the 2004 International Electron Devices Meeting, pp.971-974, 2004. ,
Predictive Simulations and Optimization of Advanced Ultra-Shallow Junction formation for Nano-CMOS devices, 2007 International Workshop on Junction Technology, pp.17-22, 2007. ,
DOI : 10.1109/IWJT.2007.4279936
Ultra-shallow Carborane molecular implant for 22-nm node p- MOSFET performance boost, Proceedings of the 9th International Workshop on Junction Technology, pp.27-30, 2009. ,
Mechanisms of B deactivation control by F co-implantation, Applied physics letters, vol.86, p.101905, 2005. ,
Thermal stability of boron electrical activation in preamorphised ultra-shallow junctions, Materials Science and Engineering: B, vol.114, issue.115, pp.114-115, 2004. ,
DOI : 10.1016/j.mseb.2004.07.049
Defects evolution and dopant activation anomalies in ion implanted silicon, Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, vol.253, issue.1-2, pp.68-79, 2006. ,
DOI : 10.1016/j.nimb.2006.10.046
Chaneling effect measurements of the recrystallization of amorphous Si layers on crystal Si, Physics Letters A, vol.54, issue.2, pp.157-158, 1975. ,
DOI : 10.1016/0375-9601(75)90847-6
Activation energy analysis as a tool for extraction and investigation of p???n junction leakage current components, Journal of Applied Physics, vol.94, issue.2, pp.1218-1221, 2003. ,
DOI : 10.1063/1.1582553
Boron diffusion in amorphous silicon and the role of fluorine, References ~ 107 ~, pp.4283-4285, 2004. ,
DOI : 10.1063/1.1751225
On the understanding of the effects of high pressure deuterium and hydrogen final anneal, Proceedings of the 13 th International Conference on Ultimate Integration on Silicon, pp.9-12, 2012. ,
Implantation and transient B diffusion in Si: The source of the interstitials An accurate model of subbreakdown due to band-to-band tunneling and some applications, Applied physics letters IEEE Transactions on Electron Devices, vol.65, issue.37, pp.2305-2307, 1990. ,
Quantification of Drain Extension Leakage in a Scaled Bulk Germanium PMOS Technology, IEEE Transactions on Electron Devices, vol.56, issue.12, pp.3115-3122, 2009. ,
DOI : 10.1109/TED.2009.2033156
Recent Advances in Implantation and Diffusion Modeling for the Design and Process Control of Bipolar ICs, ECS Silicon Symposium, vol.41, p.968, 1977. ,
Ultra shallow junctions formed by sub-melt laser annealing, 2005 13th International Conference on Advanced Thermal Processing of Semiconductors, pp.87-91, 2005. ,
DOI : 10.1109/RTP.2005.1613687
Planar Fully depleted SOI technology: A powerful architecture for the 20nm node and beyond, Proceedings of the 2010 International Electron Devices Meeting, 2010. ,
Defect evolution after germanium preamorphization in silicon on insulator structures References ~ 108 ~ [Fazzini'08b Evolution of end-of-range defects in silicon-on-insulator substrates, Journal of Vacuum Science \& Technology B: Microelectronics and Nanometer Structures Materials Science and Engineering: B, vol.26, pp.342-346, 2008. ,
Integration of Germanium-on-Insulator and Silicon MOSFETs on a Silicon Substrate, IEEE Electron Device Letters, vol.27, issue.11, pp.911-913, 2006. ,
DOI : 10.1109/LED.2006.883286
Uphill diffusion of ultralow-energy boron implants in preamorphized silicon and silicon-on-insulator, Journal of Applied Physics, vol.102, issue.10, p.103707, 2007. ,
DOI : 10.1063/1.2812676
Implementation of flash technology for ultra shallow junction formation: Challenges in process integration, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol.24, issue.1, pp.515-520, 2006. ,
DOI : 10.1116/1.2151903
Impact of fluorine co-implantation on B deactivation and leakage currents in low and high energy Ge preamorphised p+n shallow junctions, Materials Science and Engineering: B, vol.154, issue.155, pp.268-274, 2008. ,
DOI : 10.1016/j.mseb.2008.09.040
Deactivation of submelt laser annealed arsenic ultrashallow junctions in silicon during subsequent thermal treatment, Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, vol.28, pp.1-1, 2010. ,
Advanced high-?? dielectric stacks with polySi and metal gates: Recent progress and current challenges, IBM Journal of Research and Development, vol.50, issue.4.5, pp.387-410, 2006. ,
DOI : 10.1147/rd.504.0387
Why should we do 3D integration?, Proceedings of the 45th Design Automation Conference, pp.674-675, 2008. ,
Understanding the role of buried Si/SiO2 interface on dopant and defect evolution in PAI USJ, Materials Science and Engineering: B, pp.124-125, 2005. ,
Electrical activation of solid-phase epitaxially regrown ultra-low energy boron implants in Ge preamorphised silicon and SOI, Physics Research Section B: Beam Interactions with Materials and Atoms, pp.107-112, 2005. ,
Effect of buried Si/SiO2 interface on dopant and defect evolution in preamorphizing implant ultrashallow junction, Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, vol.24, pp.442-445, 2006. ,
Diffusion and activation of ultrashallow B implants in silicon on insulator: End-of-range defect dissolution and the buried Si???SiO2 interface, Applied Physics Letters, vol.89, issue.4, pp.42111-042111, 2006. ,
DOI : 10.1063/1.2240257
Boron deactivation in preamorphized silicon on insulator: Efficiency of the buried oxide as an interstitial sink, Applied Physics Letters, vol.91, issue.9, pp.92122-92122, 2007. ,
DOI : 10.1063/1.2778749
Prediction of B???Sii???F complex formation and its role in B transient enhanced diffusion suppression and deactivation, Journal of Applied Physics, vol.101, issue.6, p.66102, 2007. ,
DOI : 10.1063/1.2710432
Band-edge metal gate materials for atomic-layer-deposited HfO2 for future CMOS technology, Microelectronic engineering, pp.2205-2208, 2007. ,
DOI : 10.1016/j.mee.2007.04.028
The Future of Integrated Circuits: A Survey of Nanoelectronics, Proceedings of the IEEE, pp.11-38, 2010. ,
DOI : 10.1109/JPROC.2009.2032356
Mechanism analysis of gate-induced drain leakage in off-state n-MOSFET A new recombination model for device simulation including tunneling, Proceedings of the References ~ 110 ~ [Hurkx'92, pp.331-338, 1992. ,
pdf [ITRS'11] http://www.itrs.net/Links Process-design considerations for three dimensional memory integration, Proceedings of the 2009 VLSI Technology Symposium, pp.60-63, 2009. ,
Metastable boron active concentrations in Si using flash assisted solid phase epitaxy, Journal of Applied Physics, vol.96, issue.12, pp.7357-7360, 2004. ,
DOI : 10.1063/1.1814792
Junction leakage characteristics in modified LOCOS isolation structures with a nitride spacer, IEEE Transactions on Electron Devices, vol.46, issue.1, pp.145-150, 1999. ,
DOI : 10.1109/16.737453
Requirements and Challenges in Ion Implanter for Sub-100nm CMOS Device Fabrication, Proceedings of the 17 th international Conference of Application of Accelerators in Research and Industry, pp.697-700, 2003. ,
Study of reverse annealing behaviors of p[sup +]/n ultrashallow junction formed using solid phase epitaxial annealing, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol.20, issue.1, pp.422-426, 2002. ,
DOI : 10.1116/1.1424279
Dopant-enhanced solid-phase epitaxy in buried amorphous silicon layers, Physical Review B, vol.76, issue.4, p.45216, 2007. ,
DOI : 10.1103/PhysRevB.76.045216
Band-to-band tunnelling model of gate induced drain leakage current in silicon MOS transistors, Electronics Letters, vol.32, issue.8, pp.767-769, 1996. ,
DOI : 10.1049/el:19960538
High Speed and Highly Cost effective 72M bit density S3 SRAM Technology with Doubly Stacked Si Layers, Peripheral only CoSix layers and Tungsten Shunt W/L Scheme for Standalone and Embedded Memory Proceedings of the 2007 VLSI Technology SymposiumVLSI Technology A 500-MHz DDR High- Performance 72-Mb 3-D SRAM Fabricated With Laser-Induced Epitaxial c-Si Growth Technology for a Stand-Alone and Embedded Memory Application, IEEE Transactions on Electron Devices, pp.82-83, 2007. ,
Interaction of the end of range defect band with the upper buried oxide interface for B and BF[sub 2] implants in Si and silicon on insulator with and without preamorphizing implant, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol.26, issue.1, pp.347-350, 2008. ,
DOI : 10.1116/1.2816936
Zener tunneling in semiconductors, Journal of Physics and Chemistry of Solids, vol.12, issue.2, pp.181-188, 1960. ,
DOI : 10.1016/0022-3697(60)90035-4
Theory of Tunneling, Journal of Applied Physics, vol.32, issue.1, pp.83-91, 1961. ,
DOI : 10.1063/1.1735965
Gate-Extension Overlap Control by Sb Tilt Implantation(Junction Formation and TFT Reliability, <Special Section> Fundamentals and Applications of Advanced Semiconductor Devices), IEICE transactions on electronics, vol.90, pp.973-977, 2007. ,
Cost of Ownership/Yield Enhancement of High Volume Immersion Lithography Using Topcoat-Less Resists References ~ 112 ~ Optimization of n-junction through ion beam shadowing and buffering effect by tilt implantation with rotation for improving the retention time, Proceeding of the international conference on Ion Implantation Technology, pp.63-71, 2000. ,
3D silicon integration, Proceedings of 58th Electronic Components and Technology Conference, pp.538-543, 2008. ,
Physically based kinetic Monte Carlo modeling of arsenic-interstitial interaction and arsenic uphill diffusion during ultrashallow junction formation, Journal of Applied Physics, vol.104, issue.1, p.13514, 2008. ,
DOI : 10.1063/1.2942398
Process Technology Variation, IEEE Transactions on Electron Devices, vol.58, issue.8, pp.2197-2208, 2011. ,
DOI : 10.1109/TED.2011.2121913
Considerations for Ultimate CMOS Scaling, IEEE Transactions on Electron Devices, vol.59, issue.7, pp.1813-1828, 2012. ,
DOI : 10.1109/TED.2012.2193129
A 3-D BiCMOS technology using selective epitaxial growth (SEG) and lateral solid phase epitaxy (LSPE), International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001. ,
DOI : 10.1109/IEDM.2001.979617
Comprehensive and Accurate Parasitic Capacitance Models for Two- and Three-Dimensional CMOS Device Structures, IEEE Transactions on Electron Devices, vol.59, issue.5, pp.1332-1344, 2012. ,
DOI : 10.1109/TED.2012.2187454
Deactivation of Solid Phase Epitaxy-Activated Boron Ultrashallow Junctions, Journal of The Electrochemical Society, vol.152, issue.10, pp.787-793, 2005. ,
DOI : 10.1149/1.2018176
The solid solubility and thermal behavior of metastable concentrations of As in Si Applied physics letters Metastable As-concentrations in Si achieved by ion implantation and rapid thermal annealing, Journal of Applied Physics, vol.36, issue.52, pp.765-768, 1980. ,
A comprehensive study of inversion current in MOS tunneling diodes, IEEE Transactions on Electron Devices, vol.48, issue.9, pp.2125-2130, 2001. ,
DOI : 10.1109/16.944205
Leakage optimization of ultra-shallow junctions formed by solid phase epitaxial regrowth, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol.22, pp.306-311, 2004. ,
SPER junction optimisation in 45 nm CMOS devices, The Fourth International Workshop on Junction Technology, 2004. IWJT '04., pp.70-75, 2004. ,
DOI : 10.1109/IWJT.2004.1306762
Advanced Nanoanalysis of a Hf-Based High-k Dielectric Stack Prior to Activation, Electrochemical and Solid-State Letters, vol.10, issue.6, pp.33-35, 2007. ,
DOI : 10.1149/1.2718399
Experimental investigations and simulation of the deactivation of arsenic during thermal processes after activation by SPER and spike annealing, Mat. Res. Soc. Symp. Proc, pp.211-215, 2008. ,
Fully Silicided Metal Gates for High-Performance CMOS Technology: A Review, Journal of The Electrochemical Society, vol.152, issue.7, pp.550-555, 2005. ,
DOI : 10.1149/1.1924307
Drain current variability and MOSFET parameters correlations in planar FDSOI technology The kinetics of dopant-enhanced solid phase epitaxy in H-free amorphous silicon layers, Proceedings of the 2011 International Electron Devices Meeting Physics Research Section B: Beam Interactions with Materials and Atoms, pp.350-354, 1999. ,
Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance, 2010 International Electron Devices Meeting, 2010. ,
DOI : 10.1109/IEDM.2010.5703278
Rapid annealing and the anomalous diffusion of ion implanted boron into silicon, Applied Physics Letters, vol.50, issue.7, pp.416-418, 1987. ,
DOI : 10.1063/1.98160
Predictive Simulation of Advanced Nano-CMOS Devices Based on kMC Process Simulation, IEEE Transactions on Electron Devices, vol.54, pp.2155-2163, 2007. ,
A physics based approach to ultra-shallow p+-junction formation at the 32 nm node, Proceedings of the 2002 International Electron Devices Meeting, pp.879-882, 2002. ,
01/fine-grain-3d-integration- why-how.html [Moore'65, Cramming More Components Onto Integrated Circuits Electronics Magazine, vol.38, issue.2 8, pp.114-117, 1965. ,
New method for parameter extraction in deep sub-micrometer MOSFETs, Proceedings of 2000 International. Conference on Microelectronic Test Structure, pp.181-186, 2000. ,
Successful integration scheme of cost effective dual embedded stressor featuring carbon implant and solid phase epitaxy for high performance CMOS Deactivation Kinetics in Heavily Arsenic-Doped Silicon, Proceedings of the 2009 International Symposium on VLSI Technology, Systems and Applications, pp.26-27, 1999. ,
Kinetics of solid phase crystallization in amorphous silicon, Proceeding of the 43rd International Reliability Physics Symposium, pp.1-77, 1988. ,
DOI : 10.1016/S0920-2307(88)80005-7
Chemical and electrical dopants profile evolution during solid phase epitaxial regrowth, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol.22, issue.1, pp.297-301, 2004. ,
DOI : 10.1116/1.1643053
Evidence on the mechanism of boron deactivation in Ge-preamorphized ultrashallow junctions, Applied Physics Letters, vol.84, issue.12, pp.2055-2057, 2004. ,
DOI : 10.1063/1.1682697
Ion-beam-induced amorphization and recrystallization in silicon, Journal of Applied Physics, vol.96, issue.11, pp.5947-5976, 2004. ,
DOI : 10.1063/1.1808484
Front-end process modeling in silicon, The European Physical Journal B, vol.26, issue.232, pp.323-359, 2009. ,
DOI : 10.1140/epjb/e2009-00378-9
Process models for advanced annealing schemes and their use in device simulation, Extended Abstracts, 2008 8th International Workshop on Junction Technology (IWJT '08), pp.120-125, 2008. ,
DOI : 10.1109/IWJT.2008.4540031
Modeling arsenic deactivation through arsenic-vacancy clusters using an atomistic kinetic Monte Carlo approach, jun 2005. References ~ 116 ~ [Planes'12] N. Planes, Monsieur, D. Barge, L. Pinzelli, M. Mellier, F. Boeuf, F. Arnaud, and M. Haond, " 28nm FDSOI technology platform for high-speed low-voltage digital applications Proceedings of the 2012 VLSI Technology Symposium, pp.252103-252103, 2012. ,
DOI : 10.1063/1.1948533
Revisited approach for the characterization of Gate Induced Drain Leakage, Solid-State Electronics, vol.71, pp.37-41, 2012. ,
DOI : 10.1016/j.sse.2011.10.017
Electrical characteristics of 8-/spl Aring/ EOT HfO/sub 2//TaN low thermal-budget n-channel FETs with solid-phase epitaxially regrown junctions, IEEE Transactions on Electron Devices, vol.53, issue.7, pp.1657-1668, 2006. ,
DOI : 10.1109/TED.2006.876274
Characterization & Modeling of Gate-Induced-Drain-Leakage with complete overlap and fringing model, Proceedings of 2010 International Conference on Microelectronic Test Structures, pp.210-213, 2010. ,
Improved Split C???V Method for Effective Mobility Extraction in sub-0.1-<tex>$muhbox m$</tex>Si MOSFETs, IEEE Electron Device Letters, vol.25, issue.8, pp.583-585, 2004. ,
DOI : 10.1109/LED.2004.832786
A new model for the description of gate voltage and temperature dependence of gate induced drain leakage (GIDL) in the low electric field region [DRAMs], IEEE Transactions on Electron Devices, vol.47, issue.1, pp.154-159, 2000. ,
DOI : 10.1109/16.817581
Arsenic deactivation enhanced diffusion: A time, temperature, and concentration study, Journal of Applied Physics, vol.84, issue.7, pp.3593-3601, 1998. ,
DOI : 10.1063/1.368593
Leakage current mechanisms and leakage reduction techniques in deepsubmicrometer CMOS circuits Effect of Thermal Stresses on Carrier Mobility and Keep-Out Zone Around Through-Silicon Vias for 3-D Integration, Proceedings of the IEEE IEEE Transactions on Device and Materials Reliability, pp.255-262, 2012. ,
Influence of the surface Si/buried oxide interface on extended defect evolution in silicon-on-insulator scaled to 300 ???, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, vol.20, issue.6, pp.2243-2247, 2002. ,
DOI : 10.1116/1.1517410
Impact of gate-induced drain leakage current on the tail distribution of DRAM data retention time, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138), pp.837-840, 2000. ,
DOI : 10.1109/IEDM.2000.904447
Gate-Extension Overlap Control by Sb Tilt Implantation, IEICE Transactions on Electronics, vol.90, issue.5, pp.973-977, 2007. ,
DOI : 10.1093/ietele/e90-c.5.973
Modeling of low energy-high dose arsenic diffusion in silicon in the presence of clustering-induced interstitial generation, Journal of Applied Physics, vol.102, issue.4, p.43532, 2007. ,
DOI : 10.1063/1.2773695
FDSOI devices: a solution to achieve low junction leakage with low temperature processes (? 650ºC), Proceedings of the 2012 International Conference on Ultimate Integration of Silicon, pp.169-172, 2012. ,
Competitive SOC with UTBB SOI, IEEE 2011 International SOI Conference, pp.1-61, 2011. ,
DOI : 10.1109/SOI.2011.6081792
Effect of vacancy and interstitial excess on the deactivation kinetics of As in Si, Applied Physics Letters, vol.80, issue.25, pp.4774-4776, 2002. ,
DOI : 10.1063/1.1489719
Overlay as the key to drive wafer scale 3D integration Microelectronic engineering Physical mechanisms of transient enhanced dopant diffusion in ion-implanted silicon, Journal of Applied Physics, vol.84, issue.81, pp.1412-1415, 1997. ,
Effects of electrically active impurities on the epitaxial regrowth rate of amorphized silicon and germanium, Thin Solid Films, vol.93, issue.1-2, pp.171-178, 1982. ,
DOI : 10.1016/0040-6090(82)90102-X
Temperature Dependence of Indirect Interband Tunneling in Germanium, Physical Review, vol.132, issue.6, pp.2506-2514, 1963. ,
DOI : 10.1103/PhysRev.132.2506
Enabling SOI-based assembly technology for three-dimensional (3d) integrated circuits (ICs), Proceedings of the 2005 International Electron Devices Meeting, pp.352-355, 2005. ,
Interstitial injection in silicon after high-dose, low-energy arsenic implantation and annealing, Applied Physics Letters, vol.87, issue.20, p.201903, 2005. ,
DOI : 10.1063/1.2130397
Gate-last vs. gate-first technology for aggressively scaled EOT logic/RF CMOS, Proceedings of the 2011 VLSI Technology Symposium, pp.34-35, 2011. ,
Solid Solubility and Diffusion Coefficients of Boron in Silicon, Journal of The Electrochemical Society, vol.116, issue.8, 1969. ,
DOI : 10.1149/1.2412239
3D monolithic integration: Technological challenges and electrical results, References ~ 119 ~ [Vinet'11 Microelectronic engineering, pp.331-335, 2011. ,
DOI : 10.1016/j.mee.2010.10.022
Retention Tail Improvement for Gbit DRAMs through Trap Passivation confirmed by Activation Energy Analysis, 2006 European Solid-State Device Research Conference, pp.250-253, 2006. ,
DOI : 10.1109/ESSDER.2006.307685
A systematic study of the influence of nitrogen in tuning the effective work function of nitrided metal gates, Proceedings of the 2005 International Symposium on VLSI Technology, Systems and Applicationsin, pp.105-106, 2005. ,
Dual-channel technology with cap-free single metal gate for high performance CMOS in gate-first and gate-last integration, Proceedings of the 2011 International Electron Devices Meeting, 2011. ,
Technologies for 3D wafer level heterogeneous integration, 2008 Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, pp.123-126, 2008. ,
DOI : 10.1109/DTIP.2008.4752966
Ion-Ioff performance analysis of FDSOI MOSFETs with low processing temperature, Extended Abstracts of the 2010 International Conference on Solid State Devices and Materials, pp.1-02, 2010. ,
DOI : 10.7567/SSDM.2010.C-6-4
URL : https://hal.archives-ouvertes.fr/hal-00604646
Off-state leakage current in nanoscale MOSFET with Hf-based gate dielectrics, Proceeding of the 2nd International Nanoelectronics Conference, pp.1189-1192, 2008. ,
Trends in R&D in TSV Technology for 3D LSI packaging, QUARTERLY REVIEW, issue.3, pp.26-39 ,
Dummy Poly Silicon Gate Removal by Wet Chemical Etching, ECS Transactions, vol.34, pp.361-364, 2011. ,
DOI : 10.1149/1.3567604
Gate-Induced-Drain-Leakage Current in 45-nm CMOS Technology, IEEE Transactions on Device and Materials Reliability, vol.8, issue.3, pp.501-508, 2008. ,
DOI : 10.1109/TDMR.2008.2002350
Ion Implantation: Science and Technology, 1998. ,
Ion-Ioff performance analysis of FDSOI MOSFETs with low processing temperature, Extended Abstracts of the 2010 International Conference on Solid State Devices and Materials, pp.1-02, 2010. ,
DOI : 10.7567/SSDM.2010.C-6-4
URL : https://hal.archives-ouvertes.fr/hal-00604646
Improved extraction of GIDL in FDSOI devices for proper junction quality analysis, 2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC), pp.267-270, 2011. ,
DOI : 10.1109/ESSDERC.2011.6044183
FDSOI: A solution to suppress boron deactivation in low temperature processed devices, Proceedings of the 12th International Workshop on Junction Technology (IWJT 2012), pp.69-72, 2012. ,
Improvements in Low Temperature (<625°C) FDSOI Devices down to 30nm gate length, Proceedings of the 2012 International Symposium on VLSI Technology, Systems and Applications, pp.1-2, 2012. ,
FDSOI devices: a solution to achieve low junction leakage with low temperature processes (? 650ºC), Proceedings of the 2012 International Conference on Ultimate Integration of Silicon, pp.169-172, 2012. ,
Demonstration of low temperature 3D sequential FDSOI integration down to 50 nm gate length, Proceedings of the 2011 VLSI Technology Symposiumin, pp.158-159, 2011. ,
Advances, challenges and opportunities in 3D CMOS sequential integration, Proceedings of the 2011 International Electron Devices Meeting, 2011. ,
20nm Gate Length Trigate pFETs on Strained SGOI for High Performance CMOS, Proceedings of the 2010 VLSI Technology Symposiumin, pp.37-38, 2010. ,