Générateurs de suites binaires vraiment aléatoires : modélisation et implantation dans des cibles FPGA

Abstract : This thesis addresses the topic of the generation of random binary streams in FPGA and especially random sequences whose origin is physical and not algorithmic. Such sequences find abundant use in most cryptographic protocols. A state of the art regarding the various methods of generating true randomness in programmable logic is presented as a critical analysis of scientific articles. A synthesis of different trends in the extraction and generation of true randomness is presented. A campaign of experiments and measurements is presented to characterize the different sources of random signals available inside the FPGA. Interesting phenomena such as the locking of several ring oscillators and the sensibility of the source of randomness depending to the surrounding logic activity are reported. Several new methods for generating random binary sequences are described and analyzed. Finally a new simulation methodology in VHDL and a mathematical model of a ring oscillator as a source of randomness for TRNG are presented
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Theses
Électronique. Université Jean Monnet - Saint-Etienne, 2010. Français. <NNT : 2010STET4020>


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Boyan Valtchanov. Générateurs de suites binaires vraiment aléatoires : modélisation et implantation dans des cibles FPGA. Électronique. Université Jean Monnet - Saint-Etienne, 2010. Français. <NNT : 2010STET4020>. <tel-00757007v2>

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