F. Filtre, interpolation : réponse fréquentielle globale, p.128

M. Principe-de-l-'étalement-du-spectre-de-la, 165 4.23 Spectres des signaux V outp, p.166

C. Contenu-du, 171 4.28 THD+N (dBr) en fonction de l'amplitude du signal d'entrée, p.173

C. ?? and C. , Exemple d'implémentation de l'action intégrale I 2 dans le f ltre de boucle du

C. , C. Intégrateur-"-actif, and R. , IV A.2 Intégrateur VII B.1 Schéma équivalent en bruit en tension d'un transistor, XVII B.6 Schéma dynamique petits signaux équivalent . . . . . . . . . . . . . . . . . . XVII B.7 Schémas électrique et dynamique équivalent d'un étage de gain "source commune

F. Insa-de-lyon, . De-la-boucle, . De, and . Numérique, Cette thèse est accessible à l'adresse : http://theses.insa-lyon.fr/publication

A. Dobrucki, V. Lemarquand, and G. Lemarquand, Motor nonlinearities in electrodynamic loudspeakers : Modelling and measurement, Archives Of Acoustics, vol.4, pp.407-418, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00436573

E. Cachan, Base de donnée des expériences -[en ligne] -Disponible sur <http, 2008.

M. Salovarda, Estimating Perceptual Audio System Quality Using PEAQ Algorithm, 2005 18th International Conference on Applied Electromagnetics and Communications, pp.22-26, 2005.
DOI : 10.1109/ICECOM.2005.205017

J. Beaumier and . Louis, Introduction à la psychoacoustique [en ligne] -Disponible sur <http, 2008.

R. Van-der-zee, High Efficiency Audio Power Amplifier Design & Pratical Use, 1999.

J. Kih, Class AB large swing CMOS buffer amplif er with controlled bias current, IEEE Journal of Solid-State Circuits, vol.28, pp.1350-1353, 1993.

D. Burrow and S. Grant, Efficiency of low power audio amplifiers and loudspeakers, IEEE Transactions on Consumer Electronics, vol.47, issue.3, pp.622-630, 2001.
DOI : 10.1109/30.964155

. Stmicroelectronics, Gamme d'amplif cateur de classe D -[en ligne] -Disponible sur <http

. International-rectif-er, Class D audio basics [en ligne] -Disponible sur <http, 2008.

P. Dondon and J. M. Micouleau, An original approach for the design of a class D power switching amplif er-an audio application, Proceedings of the 6 th IEEE International Conference on Electronics, Circuits and Systems, pp.161-164, 1999.

L. Risbo, Discrete-time modeling of continuous-time pulse width modulator loops, Proceedings of the 125 th AES Convention, pp.15-19, 2005.

L. Risbo, M. Hoyerby, and M. Andersen, A versatile discrete-time approach for modeling switch-mode controllers, 2008 IEEE Power Electronics Specialists Conference, pp.1008-1014, 2008.
DOI : 10.1109/PESC.2008.4592062

B. Pilloud and W. H. Groeneweg, A 650mW f lterless class D audio power amplif er for mobile applications in 65nm technology, Proceedings of the IEEE International Symposium on Circuits and Systems, pp.1173-1176, 2009.

W. H. Groeneweg, Analog signal processing for a class D audio amplif er in 65 nm CMOS technology, Proceedings of the 34 th European Solid-State Circuits Conference, pp.322-325, 2008.

S. Krit, H. Amrani, H. Qjidaa, and H. Cordonnier, Class D audio amplif er design theory and design implementation for portable applications, Proceedings of the International Symposium on Computational Intelligence and Intelligent Informatics, pp.239-245, 2007.
DOI : 10.1109/isciii.2007.367396

B. Forejt, V. Rentala, G. Burra, and J. Arteaga, A 250 mw class D design with direct battery hookup in a 90 nm process, Proceedings of the IEEE Custom Integrated Circuits Conference, pp.169-172, 2004.

M. Berkhout, Integrated class D amplif er, Proceedings of the 95 th AES Convention, pp.54-58, 2002.

A. R. Oliva, S. S. Ang, and T. V. Vo, A multi-loop voltage feedback filterless class-D switching audio amplifier using unipolar pulse-width-modulation, IEEE Transactions on Consumer Electronics, vol.50, issue.1, pp.312-319, 2004.
DOI : 10.1109/TCE.2004.1277879

L. Risbo, PWM amplif er control loops with minimum aliasing distortion, Proceedings of the 120 th AES Convention, pp.8-12, 2006.

M. Tong-tan, J. S. Chang, B. Hock-chuan-chua, and . Gwee, An investigation into the parameters affecting THD in low-voltage low-power class D amplif ers, IEEE Transactions on Circuits and Systems I, vol.50, pp.1304-1315, 2003.

M. Atsushi, N. Nishimura, and Y. Liu, Filterless multi-level ?? class D amplif er for portable applications, International IEEE Symposium on Circuits and Systems, pp.1177-1180, 2009.

E. Gaalaas, B. Y. Liu, and N. Nishimura, Integrated stereo ?? class D amplif er, Digest of Technical Papers of IEEE International Solid-State Circuits Conference, pp.520-528, 2005.

C. Trehan and K. S. Chao, A high performance class D amplif er with cascaded ?? modulators, Proceedings of the 47 th Midwest Symposium on Circuits and Systems, pp.345-353, 2004.

V. M. Tousi, F. Sahandi, M. Atarodi, and M. Shojaei, A 3.3V-1W class D audio power amplif er with 103 dB DR and 90% eff ciency, Proceedings of the 23 rd International Conference on Microelectronics, pp.581-584, 2002.

V. Jhon, Why 1bit ?? conversion is unsuitable for high-quality applications, Proceedings of the 115 th AES Convention, pp.55-59, 2001.

K. M. Smedley and S. Cuk, One-cycle control of switching converters, IEEE Transactions on Power Electronics, vol.10, issue.6, pp.625-633, 1995.
DOI : 10.1109/63.471281

K. M. Smedley and S. Cuk, One-cycle control of switching converters, Proceedings of the 22 nd Annual IEEE Power Electronics Specialists Conference, pp.888-896, 1991.

Z. Lai and K. M. Smedley, A low distortion switching audio power amplif er, Record of the 26 th Annual IEEE Power Electronics Specialists Conference, pp.174-180, 1995.

K. M. Smedley, PWM controller with one cycle response -US6084450 -Publié le 04.06, 2000.

Z. Lai, One cycle control of bipolar switching power amplif ers -US5617306 -Publié le 01, 1997.

Z. Lai and K. M. Smedley, A new extension of one-cycle control and its application to switching power amplifiers, IEEE Transactions on Power Electronics, vol.11, issue.1, pp.99-105, 1996.
DOI : 10.1109/63.484422

P. J. Baxandall, Transistors sine wave LC oscillators, Proceeding of Industrial Electric Engineer Convention, pp.748-758, 1959.

S. Lee, A 2W, 92% eff ciency and 0.01% THD+N class D audio power amplif er for mobile applications, based on the novel SCOM architecture, Proceedings of the IEEE Custom Integrated Circuits Conference, pp.291-294, 2004.

B. Putzeys, Simple self-oscillating class D amplif er with full output f lter control, Proceedings of the 118 th AES Convention, pp.10-14, 2005.

W. Yu, W. Shu, and J. S. Chang, A low THD analog class D amplif er based on self-oscillating modulation with complete feedback network, IEEE International Symposium on Circuits and Systems, pp.2729-2732, 2009.

K. Nielsen, Synchronized controlled oscillation modulator -US7119629 -Publié le 10, 2006.

T. Piessens and M. Steyaert, Oscillator pulling and synchronisation issues in selfoscillating class D power amplif ers, Proceedings of the 29 th European Solid-State Circuits Conference, pp.529-532, 2003.

M. C. Hoyerby and M. A. Andersen, A Comparative Study of Analog Voltage-mode Control Methods for Ultra-Fast Tracking Power Supplies, 2007 IEEE Power Electronics Specialists Conference, pp.2970-2975, 2007.
DOI : 10.1109/PESC.2007.4342495

S. Poulsen and M. A. Andersen, Simple PWM modulator topology with excellent dynamic behavior, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04., pp.486-492, 2004.
DOI : 10.1109/APEC.2004.1295852

R. Groenenberg, An asynchronous switching high-end power amplif er, Proceedings of the 112 nd AES Convention, pp.48-52, 2002.

A. Veltman, Amplif er circuit having output f lter capacitance current feedback - US6552606 -Publié le 22, 2003.

S. C. Li, V. C. Lin, K. Nandhasri, and J. Ngarmnil, New high-efficiency 2.5 V/0.45 W RWDM class-D audio amplifier for portable consumer electronics, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.52, issue.9, pp.1767-1774, 2005.
DOI : 10.1109/TCSI.2005.852500

K. Nandhasri, J. Ngarmnil, and K. Moolpho, A 2.8v RWDM BTL class D power amplif er using an FGMOS comparator, Proceedings of IEEE International Symposium on Circuits and Systems, pp.261-264, 2002.

S. Jung, N. Kim, and G. Cho, Class D audio power amplifier with fine hysteresis control, Electronics Letters, vol.38, issue.22, pp.1302-1303, 2002.
DOI : 10.1049/el:20020936

C. Kao, W. Lin, and W. Chen, High efficiency and low distortion switching power amplifier for hearing aids, IEE Proceedings - Circuits, Devices and Systems, vol.153, issue.2, pp.143-147, 2006.
DOI : 10.1049/ip-cds:20050129

M. A. Rojas-gonzalez and E. Sanchez-sinencio, Design of a Class D Audio Amplifier IC Using Sliding Mode Control and Negative Feedback, IEEE Transactions on Consumer Electronics, vol.53, issue.2, pp.609-617, 2007.
DOI : 10.1109/TCE.2007.381736

B. Putzeys, Globably modulated self oscillating amplif er with improved linearity, Proceedings of 37 th AES Conference, pp.56-64, 2009.

R. Cellier, G. Pillonnet, A. Nagari, and N. Abouchi, A review of fully digital audio class D amplif ers topologies, Proceedings of the Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, pp.84-88, 2009.

E. Botti, A. Grosso, C. Meroni, and F. Stefani, Digital input audio power amplif ers in 0.6µm BCD technology : two examples, Proceedings of 16 th International Symposium on the Power Semiconductor Devices and ICs, pp.93-96, 2004.

K. Nielsen, A review and comparison of digital PWM methods for digital pulse modulation amplif er (PMA) systems, Proceedings of the 107 th AES Convention, pp.56-64, 1999.

P. Midya, High performance digital feedback for PWM digital audio amplif ers, Proceedings of the 121 th AES Convention, pp.85-90, 2006.

K. Nielsen, Pulse edge delay error correction (PEDEC)-a novel power stage error correction principle for power digital-analog conversion, Proceedings of the 103 rd AES Convention, pp.78-82, 1997.

A. Devices, Documentation technique SSM2517 -[en ligne] -Disponible sur <http, 2008.

L. Lennartson, Class D amplif er with digital feedback -US6759899 -Publié le 06.07, 2004.

R. Mason and T. Forzley, A scalable class D audio amplif er for low power applications, Proceedings of the 37 th AES International Conference, pp.11-20, 2009.

B. Putzeys and T. Mouton, Control of a PWM switching amplif er with global feedback, Proceedings of the AES 37 th International Conference, pp.108-117, 2009.

P. Craven, Digital PWM amplif er using nonlinear feedback and predistortion, Proceedings of the 128 th AES Convention, pp.72-76, 2010.

C. Dufaza and H. Ihs, Digital-input class D audio amplif er, Proceedings of the 128 th AES Convention, pp.42-46, 2010.

A. Ruha, Method and apparatus providing digital error correction for a class D power stage -US6466087 -Publié le 15.10, 2002.

C. Trehan and K. S. Chao, A high performance class D power amplif er using error feedback architecture, Proceedings of the 48 th Midwest Symposium on Circuits and Systems, pp.396-399, 2005.

M. A. Andersen, Comparing nonlinear with linear control methods for error correction in switching audio amplif er output stages, Proceedings of the 104 th AES Convention, pp.36-40, 1998.

M. Berkhout, Class D audio amplif ers in mobile applications, Proceedings of IEEE International Symposium on Circuits and Systems, pp.1169-1172, 2009.
DOI : 10.1109/tcsi.2010.2046200

S. Harold and . Black, Modulation Theory -363 pages, 1953.

K. Nielsen, High-f delity PWM-based amplif er concept for active loudspeaker systems with very low energy consumption, Journal of AES, vol.45, pp.554-570, 1996.

C. Pascual, Z. Song, P. T. Krein, D. V. Sarwate, P. Midya et al., High-fidelity PWM inverter for digital audio amplification: spectral analysis, real-time DSP implementation, and results, IEEE Transactions on Power Electronics, vol.18, issue.1, pp.473-485, 2003.
DOI : 10.1109/TPEL.2002.807102

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.2.6452

M. Berkhout, Clock jitter in class D audio power amplif ers, Proceedings of the 33 rd IEEE European Solid State Circuits Conference, pp.444-447, 2007.
DOI : 10.1109/esscirc.2007.4430338

S. Poulsen and M. A. Andersen, Self oscillating pwm modulators, a topological comparision, Conference Record of the Twenty-Sixth International Power Modulator Symposium, 2004 and 2004 High-Voltage Workshop., pp.403-407, 2004.
DOI : 10.1109/MODSYM.2004.1433597

R. Cellier, Sef oscillating modulator -pct en cours de dépôt -Déposé le 10.05, 2010.

G. Pillonnet, N. Abouchi, R. Cellier, and A. Nagari, THD, 70dB PSRR single ended class D using variable hysteresis control for headphone amplif ers, these.pdf © [R. Cellier] Proceedings of the IEEE International Symposium on Circuits and Systems, pp.1181-1184, 2009.
DOI : 10.1109/iscas.2009.5117972

G. Cellier and R. Pillonnet, Switching amplif er -US a1-0290646 -Publié le 18, 2010.

P. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits -5 th edition -878 pages -ISBN 9780470245996, 1984.

P. E. Holberg and D. R. Allen, CMOS Analog Circuit design -784 pages, 2002.

G. Daryl and K. Bill, EMI and emissions : rules, regulations, and options -[en ligne] -Disponible sur <http, 2001.

J. A. Ferreira, P. R. Willcock, and S. R. Holm, Sources, paths and traps of conducted EMI in switch mode circuits, IAS '97. Conference Record of the 1997 IEEE Industry Applications Conference Thirty-Second IAS Annual Meeting, pp.1584-1591, 1997.
DOI : 10.1109/IAS.1997.629063

S. Samala, V. Mishra, and K. C. Chakravarthi, 45nm CMOS class D audio driver with 79% eff ciency and 100dB SNR, Digest of Technical Papers of IEEE International Solid-State Circuits Conference, pp.86-87, 2010.

T. Instrument, Documentation technique TPA2039 -[en ligne] -Disponible sur <http, 2008.

A. Devices, Documentation technique SSM2311 [en ligne] -Disponible sur <http, 2009.

P. H. Mellor, S. P. Leigh, and B. M. Cheetham, Digital sampling process for audio class D, pulse width modulated, power amplifiers, Electronics Letters, vol.28, issue.1, pp.56-58, 1992.
DOI : 10.1049/el:19920035

F. Alonge, F. D. Ippolito, and T. Cangemi, Identification and Robust Control of DC/DC Converter Hammerstein Model, IEEE Transactions on Power Electronics, vol.23, issue.6, pp.2990-3003, 2008.
DOI : 10.1109/TPEL.2008.2005034

E. Bai, Frequency domain identification of hammerstein models, IEEE Transactions on Automatic Control, vol.48, issue.4, pp.530-542, 2003.
DOI : 10.1109/TAC.2003.809803

T. Instrument, Purepath digital amplif ers -[en ligne] -Disponible sur <http, 2009.

V. Adrian, J. S. Chang, and B. Gwee, A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.56, issue.2, pp.337-349, 2009.
DOI : 10.1109/TCSI.2008.2001831

S. Saponara, L. Fanucci, and P. Terreni, Oversampled and noise-shaped pulse-width modulator for high-f delity digital audio amplif er, Proceedings of the 13 th IEEE International Conference on Electronics, Circuits and Systems, pp.830-833, 2006.
DOI : 10.1109/icecs.2006.379917

J. S. Bah-hwee-gwee, V. Chang, and . Adrian, A micropower low-distortion digital class-D amplifier based on an algorithmic pulsewidth modulator, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.52, issue.10, pp.2007-2022, 2005.
DOI : 10.1109/TCSI.2005.852920

V. Adrian, J. S. Bah-hwee-gwee, and . Chang, A combined interpolatorless interpolation and high accuracy sampling process for digital class D amplif ers, Proceedings of IEEE International Symposium on Circuits and Systems, pp.210-214, 2005.

Y. Gu, M. Wei, and . Horowitz, A low power switching power supply for self-clocked systems, Proceedings of the International Symposium on Low Power Electronics and Design, pp.313-317, 1996.

A. P. Dancy and A. P. Chandrakasan, Ultra low power control circuits for PWM converters, PESC97. Record 28th Annual IEEE Power Electronics Specialists Conference. Formerly Power Conditioning Specialists Conference 1970-71. Power Processing and Electronic Specialists Conference 1972, pp.21-27, 1997.
DOI : 10.1109/PESC.1997.616620

V. Yousefzadeh, T. Takayama, and D. Maksimovi, Hybrid DPWM with digital delaylocked loop, Proceedings of IEEE Workshops on Computers in Power Electronics, pp.142-148, 2006.
DOI : 10.1109/compel.2006.305666

S. Guo, Digital PWM controller for high-frequency low-power DC/DC switching mode power supply, Proceedings of the 6 th IEEE International Power Electronics and Motion Control Conference, pp.1340-1346, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00410238

G. Peter, M. A. Gerzon, and . Craven, Optimal noise shaping and dither of digital signals, Proceedings of the 87 th Audio Engineering Society Convention, pp.32-38, 1989.

M. B. Sandler, Digital-to-analogue conversion using pulse width modulation, Electronics & Communications Engineering Journal, vol.5, issue.6, pp.339-348, 1993.
DOI : 10.1049/ecej:19930068

I. Fujimori and T. Sugimoto, A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter, IEEE Journal of Solid-State Circuits, vol.33, issue.12, pp.1863-1870, 1998.
DOI : 10.1109/4.735525

URL : https://hal.archives-ouvertes.fr/in2p3-00597384

I. Fujimori, A. Nogi, and T. Sugimoto, A multibit delta-sigma audio DAC with 120-dB dynamic range, IEEE Journal of Solid-State Circuits, vol.35, issue.8, pp.1066-1073, 2000.
DOI : 10.1109/4.859495

C. Travis, Specifying the jitter in audio application, Proceedings of the 117 th AES Convention, pp.30-45, 2004.

B. Putzeys, Effects of jitter on AD/DA conversion -clock and interface jitter specif cations, Proceedings of the 116 th AES Convention, pp.96-100, 2004.

R. Cellier, A fully differential digital class D amplif er with EMI spreading method for portable application, Proceedings of 37 th AES Conference, pp.54-58, 2009.

M. El-chammas and B. Murmann, A 12-GS/s 81-mW 5-bit Time-Interleaved Flash ADC With Background Timing Skew Calibration, IEEE Journal of Solid-State Circuits, vol.46, issue.4, pp.838-847, 2011.
DOI : 10.1109/JSSC.2011.2108125

C. Huang, C. Wang, and J. Wu, A CMOS 6-Bit 16-GS/s Time-Interleaved ADC Using Digital Background Calibration Techniques, IEEE Journal of Solid-State Circuits, vol.46, issue.4, pp.848-858, 2011.
DOI : 10.1109/JSSC.2011.2109511

Y. Kim, J. Lee, and S. Cho, A 10bits 300MS/s pipelined ADC using time-interleaved SAR ADC for front-end stages, Proceedings of the IEEE International Symposium on Circuits and Systems, pp.4041-4044, 2010.

M. Furuta, M. Nozawa, and T. Itakura, A 10-bit, 40MS/s, 1.21mW pipelined SAR ADC using single-ended 1.5-bit/cycle conversion technique, IEEE Journal of Solid-State Circuits, vol.35, pp.45-46, 2011.

M. Yoshioka, K. Ishikawa, T. Takayama, and S. Tsukamoto, A 10b 50MS/s 820µW SAR ADC with on-chip digital calibration, Digest of Technical Papers of IEEE International Solid-State Circuits Conference, pp.384-385, 2010.

C. Gabor, R. Temes-steven, R. Norsworthy, and . Schreier, ?? Data Converters : Theory, Design, and Simulation -512 pages -ISBN 0780310454, 1996.

C. Gabor, C. James, and . Candy, Oversampling ?? Data Converters : Theory, Design, and Simulation -512 pages, 1991.

K. Philips, ?? A/D Conversion for Signal Conditionning -227 pages -ISBN 1402046790, 2006.

M. Ortmanns and F. Gerfers, Continuous-Time ?? A/D Conversion -241 pages -ISBN 9783540284062, 2006.

D. Martin and K. Johns, Analog integrated Circuit Design -706 pages -ISBN 0471144487, 1997.

O. Shoaei, Continuous-Time ?? A/D Converters for High Speed Applications -230 pages, 1995.

A. Dabrowski, Multirate and Multiphase Switched-capacitor Circuits -312 pages, 1996.

A. Marques, V. Peluso, M. S. Steyaert, and W. M. Sansen, Optimal parameters for ???? modulator topologies, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.45, issue.9, pp.1232-1241, 1998.
DOI : 10.1109/82.718590

P. Benabes and S. Guessab, A Sigma-Delta Converter with Adjustable Tradeoff between Resolution and Consumption, 2007 14th IEEE International Conference on Electronics, Circuits and Systems, pp.230-233, 2007.
DOI : 10.1109/ICECS.2007.4510972

URL : https://hal.archives-ouvertes.fr/hal-00229753

]. R. Schreier, ?? matlab toolbox [en ligne] -Disponible sur <http ://www.mathworks.com/matlabcentral, p.19, 2009.

M. Ortmanns, F. Gerfers, and Y. Manoli, Compensation of Finite Gain-Bandwidth Induced Errors in Continuous-Time Sigma???Delta Modulators, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.51, issue.6, pp.1088-1099, 2004.
DOI : 10.1109/TCSI.2004.829234

D. M. Monticelli, A quad CMOS single-supply op amp with rail-to-rail output swing, IEEE Journal of Solid-State Circuits, vol.21, issue.6, pp.1026-1034, 1986.
DOI : 10.1109/JSSC.1986.1052645

O. Oliaei, Effect of feedback waveform in continuous-time sigma-delta modulators, Electronics Letters, vol.37, issue.14, pp.878-879, 2001.
DOI : 10.1049/el:20010604

A. Latiri, H. Aboushady, and N. Beilleau, Design of Continuous-Time ????? Modulators with Sine-Shaped Feedback DACs, 2005 IEEE International Symposium on Circuits and Systems, pp.3672-3675, 2005.
DOI : 10.1109/ISCAS.2005.1465426

URL : https://hal.archives-ouvertes.fr/hal-01418352

G. Saed and . Younis, Method and apparus for eliminating clock jitter in ct ?? AD converters -US6184812 -Publié le 06, p.2, 2001.

M. Ortmanns, F. Gerfers, and Y. Manoli, Increased jitter sensitivity in continuous and discrete time ?? modulators due to f nite opamp settling speed, IEEE International Symposium on Circuits and Systems, pp.2543-2546, 2005.

M. Ortmanns, F. Gerfers, and Y. Manoli, A continuous-time /spl Sigma//spl Delta/ Modulator with reduced sensitivity to clock jitter through SCR feedback, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.52, issue.5, pp.875-884, 2005.
DOI : 10.1109/TCSI.2005.846227

F. Gerfers, M. Ortmanns, and Y. Manoli, Design issues and performance limitations of a clock jitter insensitive multibit DAC architecture for high-performance low-power CT ???? modulators, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), pp.140-144, 2004.
DOI : 10.1109/ISCAS.2004.1328385

K. Nguyen, R. Adams, K. Sweetland, and H. Chen, A 106-dB SNR hybrid oversampling analog-to-digital converter for digital audio, IEEE Journal of Solid-State Circuits, vol.40, issue.12, pp.2408-2415, 2005.
DOI : 10.1109/JSSC.2005.856284

K. Q. Adams and R. Nguyen, A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling, IEEE Journal of Solid-State Circuits, vol.33, issue.12, pp.1871-1878, 1998.
DOI : 10.1109/4.735526

J. A. Cherry and W. M. Snelgrove, Loop delay and jitter in continuous-time delta sigma modulators, ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187), pp.596-599, 1998.
DOI : 10.1109/ISCAS.1998.704585

L. Risbo, ?? Modulators : Stability Analysis and Optimization -196 pages, 1994.

. Jr, P. F. Ferguson, A. Ganesan, and R. W. Adams, One bit higher order ?? AD converters, Proceedings of the IEEE International Symposium on Circuits and Systems, pp.890-893, 1990.

O. Oliaei, Design of continuous-time sigma-delta modulators with arbitrary feedback waveform, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.50, issue.8, pp.437-444, 2003.
DOI : 10.1109/TCSII.2003.814806

L. Hernandez, A. Wiesbauer, S. Paton, and A. D. Giandomencio, Modelling and optimization of low pass continuous-time sigma delta modulators for clock jitter noise reduction, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), pp.598-602, 2004.
DOI : 10.1109/ISCAS.2004.1328384

A. Yahia, P. Benabes, and R. Kielbasa, Inf uence of the feedback DAC delay on a continuous-time bandpass ?? converter, IEEE International Symposium on Circuits and Systems, pp.648-651, 2002.

A. Yahia, P. Benabes, and R. Kielbasa, A new technique for compensating the inf uence of the feedback DAC delay in continuous-time bandpass ?? converters, Proceedings of the 18 th IEEE Instrumentation and Measurement Technology Conference, pp.716-719, 2001.

E. N. Aghdam and P. Benabes, A new mixed stable DEM algorithm for bandpass multibit delta sigma ADC, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003, pp.962-965, 2003.
DOI : 10.1109/ICECS.2003.1301668

K. Nguyen, A. Bandyopadhyay, B. Adams, K. Sweetland, and P. Baginski, A 108dB SNR 1.1mW Oversampling DAC with a Three-Level DEM Technique, 2008 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp.2592-2600, 2008.
DOI : 10.1109/ISSCC.2008.4523270/mm1

M. Keller, A. Buhmann, F. Gerfers, M. Ortmanns, and Y. Manoli, On the Implicit Anti-Aliasing Feature of Continuous-Time Cascaded Sigma&#x2013;Delta Modulators, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.54, issue.12, pp.2639-2645, 2007.
DOI : 10.1109/TCSI.2007.906070

G. F. Franklin, Digital Control of Dynamics Systems -3 rd edition -742 pages -ISBN 0979122600, 1998.

H. Peng, Modeling of Quantization Effects in Digitally Controlled DC&ndash;DC Converters, Proceeding of 35 th IEEE Power Electronics Specialists Conference, pp.142-146, 2004.
DOI : 10.1109/TPEL.2006.886602

A. V. Peterchev, Quantization resolution and limit cycling in digitally control PWM converter, Proceeding of IEEE Transactions on Power Electronics, pp.126-130, 2003.
DOI : 10.1109/pesc.2001.954158

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.308.4004

M. T. Tham, Internal model control Introduction To Robust Control -[en ligne] - Disponible sur <http

D. Aniruddha, Adaptive Internal Model Control -148 pages -ISBN 3540762523, 1998.

Y. P. Tsividis, Integrated continuous-time filter design - an overview, IEEE Journal of Solid-State Circuits, vol.29, issue.3, pp.166-176, 1994.
DOI : 10.1109/4.278337

S. Lindfors, K. Halonen, and M. Ismail, A 2.7-V elliptical MOSFET-only g/sub m/C-OTA filter, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.47, issue.2, pp.89-95, 2000.
DOI : 10.1109/82.821548

J. Silva-martinez, M. S. Steyaert, and W. Sansen, Design techniques for high-performance full-CMOS OTA-RC continuous-time filters, IEEE Journal of Solid-State Circuits, vol.27, issue.7, pp.993-1001, 1992.
DOI : 10.1109/JSSC.1992.1068061

S. D. Willingham and K. W. Martin, A BiCMOS low-distortion 8MHz lowpass f lter, Digest of Technical Papers of the 40 th IEEE International Solid-State Circuits Conference, pp.114-115, 1993.
DOI : 10.1109/isscc.1993.280061

W. Sansen, Distortion in elementary transistor circuits, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.46, issue.3, pp.315-325, 1999.
DOI : 10.1109/82.754864

B. Razavi, CMOS technology characterization for analog and RF design, IEEE Journal of Solid-State Circuits, vol.34, issue.3, pp.268-276, 1999.
DOI : 10.1109/4.748177

B. Song, CMOS RF circuits for data communications applications, IEEE Journal of Solid-State Circuits, vol.21, issue.2, pp.310-317, 1986.
DOI : 10.1109/JSSC.1986.1052521

F. Gerfers, M. Ortmanns, and Y. Manoli, A 1.5-v 12-bit power-efficient continuous-time third-order ???? modulator, IEEE Journal of Solid-State Circuits, vol.38, issue.8, pp.1343-1352, 2003.
DOI : 10.1109/JSSC.2003.814432

T. Instrument, Noise analysis in operational amplif er circuits -[en ligne] -Disponible sur <http, 2009.

W. Laker and K. Sansen, Design of Analog Integrated Circuit And System -898 pages - ISBN 0071134581, 1994.

R. Cellier, G. Pillonnet, and N. Abouchi, Amplif cateur de Classe D à entrée numérique et contrôle numérique pour l'application téléphonie mobile, Journées nationales du réseau doctoral en microélectronique, pp.7-9, 2010.

R. Hacine, G. Cellier, N. Pillonnet, and . Abouchi, Amplif cateur de Classe D auto-oscillant à hystérésis, Journées nationales du réseau doctoral en microélectronique, pp.7-9, 2010.

R. Cellier, G. Pillonnet, R. Cellier, N. Abouchi, and M. Chiollaz, Intégration d'amplif cateur de Classe D à commande numériqueA High Performance Switching Audio Amplif er using Sliding Mode Control, Colloque national du GdR SocSiP juin Joint IEEE North Est Workshop on Circuit And System juin, pp.15-17, 2008.

G. Pillonnet, R. Cellier, N. Abouchi, and M. Chiollaz, An Integrated Class D Audio Amplif er based on Sliding Mode Control, IEEE International Conference on Integrated Circuit Design and Technology, ICICDT, pp.2-5, 2008.

G. Pillonnet, R. Cellier, E. Allier, and N. Abouchi, A Topological Comparison of PWM and Hysteresis Controls in Switching Audio Amplif ers, IEEE Asia Pacific Conference on Circuit and System, pp.1-3, 2008.

. Insa-de-lyon, B. G. Tous-droits-réservés, R. Pillonnet, A. Cellier, N. Nagari et al., PSRR Single Ended Class D using Variable Hystersis Control for Headphone Amplif ers, these.pdf © [R. Cellier], [2011] IEEE International Conference on Circuit and System, pp.24-27, 2009.

R. Cellier, G. Pillonet, A. Nagari, and N. Abouchi, A Review of Fully Digital Audio Class D Amplif ers Topologies, Joint IEEE North Est Workshop on Circuit And System, NEWCAS- TAISA, pp.29-30, 2009.

R. Cellier, E. Allier, C. Crippa, G. Pillonet, A. Nagari et al., A Fully Differential Digital input Class D with EMI Spreading Method for Mobile Application, 37th International AES Conference, pp.27-29, 2009.
URL : https://hal.archives-ouvertes.fr/hal-01103685

R. Cellier and F. Amiard, Anti Glitch System Using Two Power Stage For Linear Audio Amplif er

R. Cellier and F. Amiard, Offset Cancelation For Linear Audio Amplif er Using Auto Zero Comparator

G. Pillonnet and R. Cellier, Switching Amplif er

I. Au, T. Microelectronic, and I. Sscs, Intitulé du cours donné : Fundamentals and Practical Considerations on Audio Class D Design Programme disponible à l'adresse suivante : http ://www.microelectronicsevents.com/TOM/Downloads/ToMCourses2010.pdf Travaux présentés dans un article consacré aux problématiques actuelles de la technologie XVIII Cette thèse est accessible à l'adresse, 2010.