E. Eads, Aeronautic Defense and Space company

. Syndex, www-rocq.inria.fr/syndex/. [26] The MathWorks Simulink

C. The, Cost-efficient methods and processes for safety relevant embedded systems, 2010.

S. Aerospace, Architecture Analysis and Design Language (AADL) SAE AS5506, 42] SAE Aerospace. Annex Behavior Language Compliance and Application Program Interface. SAE AS5506, 2004.

R. Alur, T. Dang, J. Esposito, Y. Hur, F. Ivancic et al., Hierarchical modeling and analysis of embedded systems, Proceedings of the IEEE, vol.91, issue.1, pp.9111-9139, 2003.
DOI : 10.1109/JPROC.2002.805817

R. Anderson, Security Engineering: A Guide to Building Dependable Distributed Systems, 2001.

C. André, F. Mallet, R. , and S. , Modeling Time(s), LNCS, pp.559-573, 2007.
DOI : 10.1007/978-3-540-75209-7_38

E. Arjomandi, M. J. Fischer, and N. A. Lynch, Efficiency of Synchronous Versus Asynchronous Distributed Systems, Journal of the ACM, vol.30, issue.3, pp.449-456, 1983.
DOI : 10.1145/2402.322387

P. Aubry, P. L. Guernic, and S. Machard, Synchronous distribution of SIGNAL programs, Proceedings of HICSS-29: 29th Hawaii International Conference on System Sciences, p.656, 1996.
DOI : 10.1109/HICSS.1996.495517

URL : https://hal.archives-ouvertes.fr/hal-00544057

F. Balarin and A. Sangiovanni-vincentelli, Schedule Validation for Embedded Reactive Real-Time Systems, 1997.
DOI : 10.1109/dac.1997.597116

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.30.7848

A. Benveniste, P. L. Guernic, and C. Jacquemot, Synchronous programming with events and relations: the SIGNAL language and its semantics, Science of Computer Programming, vol.16, issue.2, pp.103-149, 1991.
DOI : 10.1016/0167-6423(91)90001-E

A. Benveniste and G. Berry, The synchronous approach to reactive and real-time systems, Proceedings of the IEEE, pp.1270-1282, 1991.
DOI : 10.1109/5.97297

URL : https://hal.archives-ouvertes.fr/inria-00075115

A. Benveniste, B. Caillaud, and P. L. Guernic, From Synchrony to Asynchrony, CONCUR'99, Concurrency Theory, 10th International Conference, pp.162-177, 1999.
DOI : 10.1007/3-540-48320-9_13

URL : https://hal.archives-ouvertes.fr/inria-00073032

A. Benveniste, P. Caspi, S. A. Edwards, N. Halbwachs, P. L. Guernic et al., The synchronous languages twelve years later, Proceedings of the IEEE, pp.64-83, 2003.

A. Benveniste, P. Caspi, P. L. Guernic, and H. March, Jean-Pierre Talpin, and Stavros Tripakis. A protocol for loosely time-triggered architectures, Embedded Software Conference, pp.252-266, 2002.

A. Benveniste, P. L. Guernic, and C. Jacquemot, Synchronous programming with events and relations: the SIGNAL language and its semantics, Science of Computer Programming, vol.16, issue.2, pp.103-149, 1991.
DOI : 10.1016/0167-6423(91)90001-E

G. Berry and G. Gonthier, The Esterel synchronous programming language: design, semantics, implementation, Science of Computer Programming, vol.19, issue.2, 1992.
DOI : 10.1016/0167-6423(92)90005-V

URL : https://hal.archives-ouvertes.fr/inria-00075711

B. Berthomieu, J. Bodeveix, P. Farail, M. Filali, H. Garavel et al., Fiacre: an Intermediate Language for Model Verification in the Topcased Environment, 2008.
URL : https://hal.archives-ouvertes.fr/inria-00262442

B. Berthomieu, J. Bodeveix, P. Farail, M. Filali, H. Garavel et al., Fiacre: an Intermediate Language for Model Verification in the Topcased Environment, 2008.
URL : https://hal.archives-ouvertes.fr/inria-00262442

L. Besnard, T. Gautier, and P. L. Guernic, SIGNAL V4-Inria Version: Reference manual

L. Besnard, T. Gautier, P. L. Guernic, and J. Talpin, Compilation of Polychronous Data Flow Equations, Correct-by-Construction Embedded Software Synthesis: Formal Frameworks, Methodologies, and Tools, 2010.
DOI : 10.1007/978-1-4419-6400-7_1

URL : https://hal.archives-ouvertes.fr/inria-00540493

L. Besnard, T. Gautier, P. L. Guernic, and J. Talpin, Compilation of polychronous data flow equations. Correct-by-construction embedded software design, 2010.
URL : https://hal.archives-ouvertes.fr/inria-00540493

L. Besnard, T. Gautier, M. Moy, J. Talpin, K. Johnson et al., Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form, Ninth International Workshop on Automated Verification of Critical Systems (AVOCS'09). Electronic Communications of the EASST, 2009.
URL : https://hal.archives-ouvertes.fr/inria-00400272

E. Börger, The Abstract State Machines Method for High-Level System Design and Analysis, 2003.
DOI : 10.1007/978-1-84882-736-3_3

M. Marc, H. Brandis, and . Mössenböck, Single-pass generation of static single-assignment form for structured languages, ACM Transactions on Programming Languages and Systems, vol.16, issue.6, pp.1684-1698, 1994.

P. Briggs, K. D. Cooper, T. J. Harvey, and L. T. Simpson, Practical improvements to the construction and destruction of static single assignment form, Software: Practice and Experience, vol.28, issue.8, pp.859-881, 1998.
DOI : 10.1002/(SICI)1097-024X(19980710)28:8<859::AID-SPE188>3.0.CO;2-8

M. Brun, J. Delatour, and Y. Trinquet, Code Generation from AADL to a Real-Time Operating System: An Experimentation Feedback on the Use of Model Transformation, 13th IEEE International Conference on Engineering of Complex Computer Systems (iceccs 2008), pp.257-262, 2008.
DOI : 10.1109/ICECCS.2008.19

URL : https://hal.archives-ouvertes.fr/hal-01179673

J. Carlsson, K. Palmkvist, and L. Wanhammar, Synchronous Design Flow for Globally Asynchronous Locally Synchronous Systems

M. Y. Chkouri, A. Robert, M. Bozga, and J. Sifakis, Translating AADL into BIP - Application to the Verification of Real-Time Systems, International Workshop on Model Based Architecting and Construction of Embedded Systems (ACES'08), 2008.
DOI : 10.1007/978-3-540-77419-8_5

M. Y. Chkouri, A. Robert, M. Bozga, and J. Sifakis, Translating AADL into BIP -Application to the Verification of Real-Time Systems. Models in Software Engineering: Workshops and Symposia at MODELS, pp.5-19, 2008.

J. Choi, V. Sarkar, and E. Schonberg, Incremental computation of static single assignment form, Sixth International Conference on Compiler Construction, pp.223-237, 1996.
DOI : 10.1007/3-540-61053-7_64

R. Cytron, J. Ferrante, B. K. Rosen, M. N. Wegman, and F. K. Zadeck, Efficiently computing static single assignment form and the control dependence graph, ACM Transactions on Programming Languages and Systems, vol.13, issue.4, pp.451-490, 1991.
DOI : 10.1145/115372.115320

M. and C. Daniel, Globally-Asynchronous Locally-Synchronous Systems, 1984.

B. De-simone, The ESTEREL language, Proceedings IEEE, pp.79-88, 1991.

J. Delange, L. Pautet, A. Plantec, M. Kerboeuf, F. Singhoff et al., Validate, simulate, and implement ARINC653 systems using the AADL, Proceedings of the ACM SIGAda annual international conference on Ada and related technologies, SIGAda '09, pp.31-44, 2009.
DOI : 10.1145/1647420.1647435

URL : https://hal.archives-ouvertes.fr/hal-00745370

F. Doucet, M. Menarini, I. Kruger, J. Talpin, and R. Gupta, A Verification Approach for GALS Integration of Synchronous Components, Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS), 2005.
DOI : 10.1016/j.entcs.2005.05.038

D. Bruce-powel, Doing Hard Time: Developing Real-Time Systems With UML, Objects, Frameworks, And Patterns, 1999.

R. William and . Dunn, Designing Safety-Critical Computer Systems, Computer, vol.36, pp.40-46, 2003.

J. Eker, J. W. Janneck, E. A. Lee, J. Liu, J. Ludwig et al., Taming heterogeneity - the Ptolemy approach, Proc. IEEE, pp.127-144, 2003.
DOI : 10.1109/JPROC.2002.805829

A. Mariusz, M. Ü. Fecko, P. D. Uyar, A. S. Amer, T. Sethi et al., A Success Story of Formal Description Techniques: Estelle Specification and Test Generation for MIL-STD, pp.188-220, 1999.

P. H. Feiler, D. P. Gluch, and J. J. Hudak, The Architecture Analysis & Design Language (aadl): An Introduction, 2006.

R. Bedin-franca, J. Bodeveix, M. Filali, J. Rolland, D. Chemouil et al., The AADL behaviour annex ? experiments and roadmap, ICECCS '07: Proceedings of the 12th IEEE International Conference on Engineering Complex Computer Systems, pp.377-382, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00784976

A. Gamatié, T. Gautier, and L. Besnard, Modeling of Avionics Applications and Performance Evaluation Techniques Using the Synchronous Language SIGNAL, SLAP'03, 2003.
DOI : 10.1016/j.entcs.2003.05.002

A. Gamatié, Modélisation polychrone et évaluation de systèmes temps réel, 2004.

A. Gamatié and T. Gautier, Modeling of Avionics Applications and Performance Evaluation Techniques Using the Synchronous Language SIGNAL, Proceedings of SLAP'03, 2003.
DOI : 10.1016/j.entcs.2003.05.002

A. Gamatié and T. Gautier, Synchronous modeling of avionics applications using the signal language, The 9th IEEE Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings., p.144, 2003.
DOI : 10.1109/RTTAS.2003.1203046

A. Gamatié and T. Gautier, The SIGNAL Approach to the Design of System Architectures. Parallel and Distributed Systems, IEEE Transactions on, vol.21, pp.641-657, 2009.

A. Gamatié, T. Gautier, and P. L. Guernic, An Example of Synchronous Design of Embedded Real-Time Systems based on IMA, 10th International Conference on Real-time and Embedded Computing Systems and Applications, 2004.

A. Gamatié, T. Gautier, P. L. Guernic, and J. Talpin, Polychronous design of embedded real-time applications, ACM Transactions on Software Engineering and Methodology, vol.16, issue.2, p.9, 2007.
DOI : 10.1145/1217295.1217298

A. Gamatié, Designing Embedded Systems with the SIGNAL Programming Language, 2009.
DOI : 10.1007/978-1-4419-0941-1

T. Gautier, P. L. Guernic, and O. Maffeïs, For a New Real-Time Methodology, In IRISA PUBLICATION INTERNE NO, vol.870, 1994.
URL : https://hal.archives-ouvertes.fr/inria-00074314

N. Halbwachs and S. Baghdadi, Synchronous modeling of asynchronous systems, EMSOFT'02, 2002.

N. Halbwachs, P. Caspi, P. Raymond, and D. Pilaud, The synchronous dataflow programming language LUSTRE, Proceedings of the IEEE BIBLIOGRAPHY [93] Nicholas Halbwachs. Synchronous Programming of Reactive Systems, pp.1305-1320, 1991.

N. Halbwachs and S. Baghdadi, Synchronous Modelling of Asynchronous Systems, EMSOFT '02: Proceedings of the Second International Conference on Embedded Software, pp.240-251, 2002.
DOI : 10.1007/3-540-45828-X_18

N. Halbwachs, F. Lagnier, and C. Ratel, Programming and verifying real-time systems by means of the synchronous data-flow language LUS- TRE, 1994.

D. J. Hatley and I. A. Pirbhai, Strategies for real-time system specification, 1987.

E. Jahier, N. Halbwachs, and P. Raymond, Synchronous Modeling and Validation of Priority Inheritance Schedulers, Fundamental Approaches to Software Engineering Fundamental Approaches to Software Engineering, pp.140-154, 2009.
DOI : 10.1007/978-3-642-00593-0_10

URL : https://hal.archives-ouvertes.fr/hal-00384389

E. Jahier, N. Halbwachs, and P. Raymond, Synchronous modeling and validation of schedulers dealing with shared resources, 2008.

E. Jahier, N. Halbwachs, P. Raymond, X. Nicollin, and D. Lesens, Virtual execution of AADL models via a translation into synchronous programs, Proceedings of the 7th ACM & IEEE international conference on Embedded software , EMSOFT '07, pp.134-143, 2007.
DOI : 10.1145/1289927.1289951

URL : https://hal.archives-ouvertes.fr/hal-00189563

E. Jahier, L. Mandel, N. Halbwachs, and P. Raymond, The aadl2sync User Guide, 2007.

K. Johnson, L. Besnard, T. Gautier, and J. Talpin, A Synchronous Approach to Threaded Program Verification
URL : https://hal.archives-ouvertes.fr/inria-00492694

G. Kahn, The semantics of a simple language for parallel programming, J. L. Rosenfeld, pp.471-475, 1974.

A. Kaminsky, Real-Time Systems and Their Programming Languages, Computer, vol.24, pp.150-151, 1991.

G. Karsai, J. Sztipanovits, A. Ledeczi, and T. Bapty, Model-integrated development of embedded software, Proceedings of the IEEE, pp.145-164, 2003.
DOI : 10.1109/JPROC.2002.805824

C. John and . Knight, Safety Critical Systems: Challenges and Directions, 2002.

A. Kountouris and P. L. Guernic, Profiling of SIGNAL programs and its application in the timing evaluation of design implementations, IEE Colloquium on Hardware-Software Cosynthesis for Reconfigurable Systems, 1996.
DOI : 10.1049/ic:19960225

URL : https://hal.archives-ouvertes.fr/hal-00544253

J. W. Krueger, S. Vestal, and B. Lewis, Fitting the pieces together: system/software analysis and code integration using METAH, 17th DASC. AIAA/IEEE/SAE. Digital Avionics Systems Conference. Proceedings (Cat. No.98CH36267), 1998.
DOI : 10.1109/DASC.1998.741493

A. Phillip and . Laplante, Real-Time Systems Design and Analysis: An Engineer's Handbook, 1992.

O. Laurent and F. Pouzolz, Airbus generic pilot application Aircraft doors management system, 2009.

P. and L. Guernic, SIGNAL: Description algébrique des flots de signaux. Architecture des machines et systèmes informatiques, pp.243-252, 1982.

P. , L. Guernic, and A. Benveniste, Real-time, synchronous, data-flow programming: the language SIGNAL and its mathematical semantics, p.620, 1986.
URL : https://hal.archives-ouvertes.fr/inria-00076021

P. , L. Guernic, and T. Gautier, Data-flow to von Neumann: the SIGNAL approach Advanced Topics in Data-Flow Computing, pp.413-438, 1991.

P. , L. Guernic, T. Gautier, M. L. Borgne, and C. L. Maire, Programming real-time applications with Signal, Proceeding of the IEEE, 1997.
URL : https://hal.archives-ouvertes.fr/inria-00540460

T. Paul-le-guernic, M. L. Gautier, C. L. Borgne, and . Maire, Programming real-time applications with SIGNAL, Proceedings of the IEEE, pp.1321-1336, 1991.

J. Paul-le-guernic, J. Talpin, and . Lann, POLYCHRONY for System Design, Journal of Circuits, Systems and Computers, vol.12, issue.03, pp.261-304, 2002.
DOI : 10.1142/S0218126603000763

. Gérard-le-lann, Distributed Systems -Towards A Formal Approach, Information Processing, vol.77, pp.12-25, 1977.

A. Edward, A. Lee, and . Sangiovanni-vincentelli, A Framework for Comparing Models of Computation, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.17, pp.1217-1229, 1998.

I. Lee, P. Brémond-grégoire, and R. Gerber, A process algebraic approach to the specification and analysis of resource-bound real-time systems, Proceedings of the IEEE, pp.158-171, 1994.
DOI : 10.1109/5.259433

S. Lee, F. Mallet, R. , and S. , Dealing with AADL Endto-End Flow Latency with UML MARTE, Engineering of Complex Computer Systems , IEEE International Conference, pp.228-233, 2008.

K. Lundqvist and L. Asplund, A Formal Model of the Ada Ravenscar Tasking Profile, pp.12-25, 1999.

Y. Ma, J. Talpin, and T. Gautier, Virtual prototyping AADL architectures in a polychronous model of computation, 2008 6th ACM/IEEE International Conference on Formal Methods and Models for Co-Design, 2008.
DOI : 10.1109/MEMCOD.2008.4547701

URL : https://hal.archives-ouvertes.fr/inria-00265059

Y. Ma, J. Talpin, and T. Gautier, Interpretation of AADL Behavior Annex into Synchronous Formalism Using SSA, 2010 10th IEEE International Conference on Computer and Information Technology, pp.2361-2366, 2010.
DOI : 10.1109/CIT.2010.406

URL : https://hal.archives-ouvertes.fr/hal-00554416

Y. Ma, J. Talpin, S. K. Shukla, and T. Gautier, Distributed Simulation of AADL Specifications in a Polychronous Model of Computation. Embedded Software and Systems, Second International Conference, pp.607-614, 2009.
URL : https://hal.archives-ouvertes.fr/hal-00788422

F. Mallet, C. André, and J. Antoni, Executing AADL Models with UML/MARTE, 2009 14th IEEE International Conference on Engineering of Complex Computer Systems, pp.371-376, 2009.
DOI : 10.1109/ICECCS.2009.10

URL : https://hal.archives-ouvertes.fr/inria-00416592

H. Marchand, E. Rutten, M. L. Borgne, and M. Samaan, Formal verification of programs specified with signal: application to a power transformer station controller, Science of Computer Programming, vol.41, issue.1, pp.85-104, 2001.
DOI : 10.1016/S0167-6423(00)00020-4

URL : https://hal.archives-ouvertes.fr/inria-00526287

H. Marchand and M. L. Borgne, Synthesis of discrete-event controllers based on the Signal environment, Discrete Event Dynamic System: Theory and Applications, pp.325-346, 2000.
URL : https://hal.archives-ouvertes.fr/hal-00546147

D. Mathaikutty, H. Patel, and S. Shukla, A Functional Programming Framework of Heterogeneous Model of Computation for System Design, Forum on Specification and Design Languages (FDL), 2004.

N. Medvidovic and D. S. Rosenblum, Domains of Concern in Software Architectures and Architecture Description Languages, 1997.

N. Medvidovic and R. N. Taylor, A classification and comparison framework for software architecture description languages, IEEE Transactions on Software Engineering, vol.26, issue.1, pp.70-93, 2000.
DOI : 10.1109/32.825767

URL : https://hal.archives-ouvertes.fr/hal-00444077

P. Steven, J. Miller, and . Duffy, FGS Partitioning Final Report, 2004.

P. Mishra, A. Shrivastava, and N. Dutt, Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs, ACM Transactions on Design Automation of Electronic Systems, vol.11, issue.3, pp.626-658, 2006.
DOI : 10.1145/1142980.1142985

D. Monteverde, A. Olivero, S. Yovine, and V. Braberman, VTSbased Specification and Verification of Behavioral Properties of AADL Models, International Workshop on Model Based Architecting and Construction of Embedded Systems (ACES'08, 2008.

M. Mousavi, P. L. Guernic, J. Talpin, S. Kumar-shukla, and T. Basten, Modeling and Validation of Globally Asynchronous Design in Synchronous Framework, Digital Automation and Test Europe, 2003.

J. Muttersbach, T. Villiger, and W. Fichtner, Practical design of globally-asynchronous locally-synchronous systems, Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00586), pp.52-59, 2000.
DOI : 10.1109/ASYNC.2000.836791

M. Ouimet and K. Lundqvist, The Timed Abstract State Machine Language: An Executable Specification Language for Reactive Real-Time Systems, Proceedings of the 15th International Conference on Real-Time and Network Systems (RTNS '07, 2007.

M. Ouimet and K. Lundqvist, The Timed Abstract State Machine Language: An Executable Specification Language for Reactive Real-Time Systems, Proceedings of the 15th International Conference on Real-Time and Network Systems (RTNS '07, 2007.

L. Pi, J. Bodeveix, and M. Filali, A comparative study of different formalisms to define aadl data communication. www.cert.fr/feria, 2009.

L. Pi, J. Bodeveix, and M. Filali, Modeling AADL Data Communication with BIP, Ada-Europe '09: Proceedings of the 14th Ada-Europe International Conference on Reliable Software Technologies, pp.192-206, 2009.
DOI : 10.1007/978-3-540-88387-6_7

L. Pi, J. Bodeveix, and M. Filali, Modeling AADL Data Communication with BIP, Ada-Europe'09, pp.192-206, 2009.
DOI : 10.1007/978-3-540-88387-6_7

L. Pi, Z. Yang, J. Bodeveix, M. Filali, K. Hu et al., A Comparative Study of FIACRE and TASM to Define AADL Real Time Concepts, 2009 14th IEEE International Conference on Engineering of Complex Computer Systems, 2009.
DOI : 10.1109/ICECCS.2009.9

M. Pinto, L. Fuentes, and J. M. Troya, DAOP-ADL: An Architecture Description Language for Dynamic Component and Aspect-Based Development, GPCE '03: Proceedings of the 2nd international conference on Generative programming and component engineering, pp.118-137, 2003.
DOI : 10.1007/978-3-540-39815-8_8

J. Rothe, H. Tews, and B. Jacobs, The Coalgebraic Class Specification Language CCSL, Journal of Universal Computer Science, vol.7, pp.175-193, 2000.

J. Rushby, Partitioning in Avionics Architectures: Requirements, Mechanisms, and Assurance, Research Report, 1999.

I. Sander and A. Jantsch, System Modeling and Transformational Design Refinement in ForSyDe, PROCEED- INGS OF THE IEEE, pp.17-32, 1995.
DOI : 10.1109/TCAD.2003.819898

F. Singhoff and A. Plantec, AADL modeling and analysis of hierarchical schedulers, ACM international conference on Ada (SIGAda'07), 2007.
URL : https://hal.archives-ouvertes.fr/hal-00502359

I. Smarandache, Transformations affines d'horloges: application au codesign de systèmes temps réel en utilisant les langages Signal et Alpha, 1998.

I. M. Smarandache, T. Gautier, and P. L. Guernic, Validation of mixed signal-alpha real-time systems through affine calculus on clock synchronisation constraints, World Congress on Formal Methods, pp.1364-1383, 1999.
DOI : 10.1007/3-540-48118-4_22

URL : https://hal.archives-ouvertes.fr/hal-00548887

O. Sokolsky, I. Lee, and D. Clark, Schedulability analysis of AADL models, Proceedings 20th IEEE International Parallel & Distributed Processing Symposium, 2006.
DOI : 10.1109/IPDPS.2006.1639421

J. A. Stankovic, Misconceptions about real-time computing: a serious problem for next-generation systems, Computer, vol.21, issue.10, pp.10-19, 1988.
DOI : 10.1109/2.7053

J. A. Stankovic, Strategic directions in real-time and embedded systems, ACM Computing Surveys, vol.28, issue.4, pp.751-763, 1996.
DOI : 10.1145/242223.242291

J. Talpin, P. L. Guernic, S. Kumar-shukla, R. Gupta, and F. Doucet, Polychrony for formal refinement-checking in a system-level design methodology, Third International Conference on Application of Concurrency to System Design, 2003. Proceedings., 2003.
DOI : 10.1109/CSD.2003.1207695

URL : https://hal.archives-ouvertes.fr/hal-00542156

J. Talpin, J. Ouy, L. Besnard, and P. L. Guernic, Compositional design of isochronous systems, DATE '08: Proceedings of the conference on Design, automation and test in Europe, pp.928-933, 2008.
URL : https://hal.archives-ouvertes.fr/inria-00156499

J. Talpin, J. Ouy, T. Gautier, L. Besnard, and C. Alexandre, Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment, 2010 10th International Conference on Application of Concurrency to System Design, 2009.
DOI : 10.1109/ACSD.2010.14

URL : https://hal.archives-ouvertes.fr/inria-00417682

A. Toom, T. Naks, M. Pantel, M. Gandriau, and I. Wati, Gene- Auto: An Automatic Code Generator for a Safe Subset of SimuLink/StateFlow and Scicos, European Conference on Embedded Real-Time Software (ERTS'08), 2008.

K. J. Turner, Using Formal Description Techniques: An Introduction to Estelle , Lotos, and SDL, 1993.

R. Varona-gomez and E. Villar, AADL Simulation and Performance Analysis in SystemC, 2009 14th IEEE International Conference on Engineering of Complex Computer Systems, pp.323-328, 2009.
DOI : 10.1109/ICECCS.2009.11

S. Vestal and J. Krueger, Technical and Historical Overview of MetaH, Honeywell Technology Center, 2000.

D. Walker and J. J. Dongarra, Mpi: A Standard Message Passing Interface, pp.56-68, 1996.

T. Paul, S. J. Ward, and . Mellor, Structured Development for Real-Time Systems, 1991.

N. Mark, F. K. Wegman, and . Zadeck, Constant propagation with conditional branches, ACM Transactions on Programming Languages and Systems, vol.13, issue.2, pp.181-210, 1991.

D. Weil, V. Bertin, E. Closse, M. Poize, P. Venier et al., Efficient compilation of ESTEREL for real-time embedded systems, Proceedings of the international conference on Compilers, architectures, and synthesis for embedded systems , CASES '00, pp.2-8, 2000.
DOI : 10.1145/354880.354882

K. Doran and . Wilde, The ALPHA Language, 1994.

Z. Yang, K. Hu, D. Ma, and L. Pi, Towards a formal semantics for the AADL behavior annex, Design, Automation and Test in Europe (DATE'09), pp.1166-1171, 2009.

Z. Yang, K. Hu, D. Ma, and L. Pi, Towards a Formal Semantics for the AADL Behavior Annex, DATE'09, 2009.

H. F. Yu, Y. Ma, Y. Glouche, J. Talpin, L. Besnard et al., :boolean; in_flight: in data port behavior::boolean; on_ground: in data port behavior::boolean; airspeed1: in data port behavior::float; airspeed2: in data port behavior::float; airspeed3: in data port behavior::float; emerg_evac: in data port behavior::boolean; slide_armed1_1: out data port behavior::boolean; slide_armed1_2: out data port behavior::boolean; slide_armed2_1: out data port behavior::boolean; slide_armed2_2: out data port behavior::boolean; cll1: out data port behavior::boolean; cll2: out data port behavior::boolean; cll1_1: out data port behavior::boolean; cll2_1: out data port behavior::boolean; cll1_2: out data port behavior::boolean; cll2_2: out data port behavior::boolean; end door_management; system implementation door_management.imp subcomponents door1: system Door.imp; door2: system Door.imp; dps1: device DPS; dps2: device DPS; ocu1: device OCU; ocu2: device OCU; doors_process1: process doors_process.imp; doors_process2: process doors_process.imp; cpiom1: processor CPIOM.imp; cpiom2: processor CPIOM.imp; rdc1: device RDC; rdc2: device RDC; afdx: bus AFDX.imp; connections APPENDIX A. SDSCS EXAMPLE c1: data port engine_running -> doors_process1.engine_running; c2: data port on_ground -> doors_process1.on_ground; c3: data port in_flight -> doors_process1.in_flight; c4: data port airspeed1 -> doors_process1.airspeed1; c5: data port airspeed2 -> doors_process1.airspeed2; c6: data port airspeed3 -> doors_process1.airspeed3; c7: data port emerg_evac -> doors_process1.emerg_evac; c8: data port engine_running -> doors_process2.engine_running; c9: data port on_ground -> doors_process2.on_ground; c10: data port in_flight -> doors_process2dps2; c23: data port doors_process1.slide_armed1 -> slide_armed1_1; c24: data port doors_process1.slide_armed2 -> slide_armed2_1; c25: data port doors_process1.cll -> cll1; c26: data port doors_process2.slide_armed1 -> slide_armed1_2; c27: data port doors_process2.slide_armed2 -> slide_armed2_2; c28: data port doors_process2.cll -> cll2, System-level Co-simulation of Integrated Avionics Using Polychrony. the 26th ACM Symposium On Applied Computing, 2011. Appendix A SDSCS example A.1 AADL specifications system door_management features engine_running: in data port behavior