Méthodologie de compilation d'algorithmes de traitement du signal pour les processeurs en virgule fixe sous contrainte de précision

Daniel Ménard 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
Abstract : The efficient implementation of digital signal processing algorithms into embedded systems requires the use of fixed-point arithmetic in order to satisfy the cost and power consumption constraints. The manual coding of fixed-point data is a tedious and error prone task. Moreover, the reduction of the time-to-market of applications requires high-level development tools that allow the automation of some tasks. Thus, the development of automatic fixed-point conversion methodologies is needed. For Digital Signal Processor (DSP), the methodology must determine the optimal fixed-point specification which allows to maximize the accuracy and to minimize the size and the execution time of the code. The goal of this thesis is to define and develop a new methodology for the implementation of floating-point algorithms into fixed-point programmable processors with the constraint to fulfil the application quality criteria. This work is based on three main parts. First, the structure of the methodology has been defined. The analysis of the architecture influence on the computation accuracy underlines the necessity to take account of the target architecture in order to obtain an optimized implementation in terms of execution time and accuracy. Moreover, the study of the interaction between the compilation and the fixed-point conversion process allows to define the coupling needed between these two processes. The second part of this work deals with the evaluation of the fixed-point system accuracy through the determination of the Signal to Quantification Noise Ratio (SQNR). A new methodology which allows to determine automatically the analytical expression of the SQNR according to the fixed-point data format has been proposed. First, a new quantification noise model is presented. Then, the theoretical concepts for the determination of the output quantification noise power are detailed in the case of linear systems and non-linear and non-recursive systems. Finally, the methodology developed for determining automatically the SQNR expression of linear systems is explained. The last part of this work corresponds to the development of the fixed-point conversion methodology. First, the data dynamic range is evaluated with an analytical approach based on two different techniques. The dynamic information are used for the determination of the data binary point position by taking account of the number of guard bits available in the processor. For obtaining a complete fixed-point format, the data word-length is determined in order to exploit the diversity of data types manipulated by the processor. The methodology selects the set of instructions which allows to obtain a sufficient accuracy and to minimize the code execution time. The last stage of the methodology corresponds to the optimization of the fixed-point data format in order to obtain a more efficient implementation. The different scaling operations are moved for minimizing the global execution time as long as the accuracy constraint is fulfilled. Two types of method have been proposed according to the instruction level parallelism capabilities of the target processor. This methodology has been tested on different digital signal processing algorithms used in the third generation radio-communication systems. The results show the relevance of our methodology for reducing the development time of fixed-point systems.
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https://tel.archives-ouvertes.fr/tel-00609159
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Submitted on : Monday, July 18, 2011 - 2:02:19 PM
Last modification on : Thursday, November 15, 2018 - 11:57:39 AM
Long-term archiving on : Wednesday, October 19, 2011 - 2:25:14 AM

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  • HAL Id : tel-00609159, version 1

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Daniel Ménard. Méthodologie de compilation d'algorithmes de traitement du signal pour les processeurs en virgule fixe sous contrainte de précision. Traitement du signal et de l'image [eess.SP]. Université Rennes 1, 2002. Français. ⟨tel-00609159⟩

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