, Principe de la stimulation électrique fonctionnelle. Exemples d'application thérapeuthique, Techniques de l'Ingénieur, p.12, 2009.
, Multipolar Electrode and Preamplifier Design for ENG-Signal Acquisition, Biomedical Engineering Systems and Technologies of Communications in Computer and Information Science, pp.148-159, 2008.
DOI : 10.1109/TNSRE.2006.886731
URL : https://hal.archives-ouvertes.fr/lirmm-00345755
, SIP Test Architectures, System-on-chip Test Architectures : Nanometer Design for Testability, pp.405-441, 2007.
URL : https://hal.archives-ouvertes.fr/lirmm-00195243
, On-chip generator of a saw-tooth test stimulus for ADC BIST, book : SoC Design Methodologies -11th International Conference on Very Large Scale Integration of Systems-on-Chips, pp.425-436, 2002.
DOI : 10.1007/978-0-387-35597-9_36
, Amplificateur faible-bruit dédié à l'enregistrement d'ENG à partir d'une électrode cuff hexagonale, Revues à comité de lecture REE : revue de l'électricité et de l'électronique, pp.6-07, 2009.
, ADC Production Test Technique Using Low-Resolution Arbitrary Waveform Generator, VLSI Design, vol.2008, p.8, 2008.
DOI : 10.1007/s10836-006-0186-z
, Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC, IET Computers & Digital Techniques, vol.1, issue.3, pp.146-153, 2007.
DOI : 10.1049/iet-cdt:20060136
, A Novel DFT Technique to Test a Complete Set of ADC's and DAC's Embedded in a Complex SiP, IEEE Design & Test of Computers (D&T, vol.23, pp.237-243, 2006.
, A First Step for an INL Spectral-Based BIST: The Memory Optimization, Journal of Electronic Testing, vol.19, issue.6, pp.4-6, 2006.
DOI : 10.1007/s10836-006-0186-z
, Efficiency of Optimized Dynamic Test Flows for ADCs: Sensitivity to Specifications, Journal of Electronic Testing : Theory and Application (JETTA), pp.291-298, 2005.
DOI : 10.1007/s10836-005-6358-4
, DC-100-GHz frequency doublers in InP DHBT technology, IEEE Transactions on Microwave Theory and Techniques, vol.53, issue.4, pp.1338-1344, 2005.
DOI : 10.1109/TMTT.2005.845766
URL : https://hal.archives-ouvertes.fr/lirmm-00105306
, Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure, Journal of Electronic Testing : Theory and Application (JETTA), pp.375-387, 2004.
DOI : 10.1023/B:JETT.0000039605.02565.ef
, Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors, Journal of Electronic Testing, vol.20, issue.3, pp.257-267, 2004.
DOI : 10.1023/B:JETT.0000029459.74815.56
, A-to-D converters static error detection from dynamic parameter measurement, Microelectronics Journal, vol.34, issue.10, pp.945-953, 2003.
DOI : 10.1016/S0026-2692(03)00161-7
, On-Chip Generation of Ramp and Triangle-Wave Stimuli for ADC BIST, Journal of Electronic Testing : Theory and Application (JETTA), pp.469-479, 2003.
URL : https://hal.archives-ouvertes.fr/lirmm-00269602
, Analog built-in saw-tooth generator for ADC histogram test, Microelectronics Journal, vol.33, issue.10, pp.781-789, 2002.
DOI : 10.1016/S0026-2692(02)00090-3
, A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs, Journal of Electronic Testing : Theory and Application (JETTA), pp.139-147, 2001.
, Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST, Journal of Electronic Testing : Theory and Application (JETTA), pp.255-266, 2001.
, System and method for wirelessly testing integrated circuits, 2008.
URL : https://hal.archives-ouvertes.fr/lirmm-00767777
, Device for Distributing Power between Cathodes of a Multipolar Electrode, in Particular of an Implant, WO Patent WO, pp.473-477, 2006.
URL : https://hal.archives-ouvertes.fr/lirmm-00389558
, Method and device for integrated testing for an analog-to-digital converter, US Patent, vol.6642870, 2003.
, A multi-converter DFT technique for complex SIP: Concepts and validation, 2009 European Conference on Circuit Theory and Design, pp.747-750, 2009.
DOI : 10.1109/ECCTD.2009.5275087
URL : https://hal.archives-ouvertes.fr/lirmm-00448863
, Design of nerve signal biosensor, 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, pp.400-403, 2009.
DOI : 10.1109/NEWCAS.2009.5290502
URL : https://hal.archives-ouvertes.fr/lirmm-00413452
, New dependability approach for implanted medical devices, 2009 International Conference on Microelectronics, ICM, 2009.
DOI : 10.1109/ICM.2009.5418655
URL : https://hal.archives-ouvertes.fr/hal-00413484
, Biomedical Circuits : New Challenges for Design and Test, IMS3TW'08 : IEEE International Mixed-Signals, Sensors and Systems Test Workshop, p.6, 2008.
URL : https://hal.archives-ouvertes.fr/lirmm-00370937
, Low-noise ASIC and New Layout of Multipolar Electrode for both High ENG Selectivity and Parasitic Signal Rejection, 2007 14th IEEE International Conference on Electronics, Circuits and Systems, p.4, 2007.
DOI : 10.1109/ICECS.2007.4510934
URL : https://hal.archives-ouvertes.fr/lirmm-00195231
, State of the art in soc testing : The analog challenge, DTIS'06 : Design and Test of Integrated Systems in Nanoscale Tehnology, pp.100-106, 2006.
URL : https://hal.archives-ouvertes.fr/lirmm-00407019
, New electrode layout for internal selectivity of nerves, 2009 Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2009.
DOI : 10.1109/IEMBS.2009.5334437
URL : https://hal.archives-ouvertes.fr/lirmm-00413454
, Wireless Test Structure for Integrated Systems, 2008 IEEE International Test Conference, pp.25-101, 2008.
DOI : 10.1109/TEST.2008.4700704
URL : https://hal.archives-ouvertes.fr/lirmm-00375077
, Considerations on Improving the Design of Cuff Electrode for ENG Recording -Geometrical Approach , Dedicated IC, Sensitivity and Noise Rejection, BIODEVICES'08 : International Conference on Biomedical Electronics and Devices, pp.180-185, 2008.
URL : https://hal.archives-ouvertes.fr/lirmm-00334769
, A Neural Stimulator Output Stage for Dodecapolar Electrodes, 2008 IEEE Computer Society Annual Symposium on VLSI, pp.487-490, 2008.
DOI : 10.1109/ISVLSI.2008.84
URL : https://hal.archives-ouvertes.fr/lirmm-00279905
, A New Configuration of Multipolar Cuff Electrode and Dedicated IC for Afferent Signal Recording, EMBC'07 : 3rd International IEEE/EMBS Conference on Neural Engineering, pp.578-581, 2007.
URL : https://hal.archives-ouvertes.fr/lirmm-00195236
, System-in-Package, a Combination of Challenges and Solutions, 12th IEEE European Test Symposium (ETS'07), pp.193-199, 2007.
DOI : 10.1109/ETS.2007.40
URL : https://hal.archives-ouvertes.fr/lirmm-00158123
, Analogue Network of Converters" : a DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC. best paper ets'06, ETS'07 : 12th IEEE European Test Symposium, pp.211-216, 2007.
URL : https://hal.archives-ouvertes.fr/lirmm-00115676
, Analogue Network of Converters' : A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC, ETS'06 : IEEE European Test Symposium, pp.159-164, 2006.
URL : https://hal.archives-ouvertes.fr/lirmm-00115676
, A Low Cost Alternative Method for Harmonics Estimation in a BIST Context, Eleventh IEEE European Test Symposium (ETS'06), pp.193-198, 2006.
DOI : 10.1109/ETS.2006.5
URL : https://hal.archives-ouvertes.fr/lirmm-00115680
, InP HBT XOR and Phase-Detector for 40Gbit/s Clock and Data Recovery (CDR), MIKON'06 : International Conference on Microwaves, Radar & Wireless Communications, pp.1115-1118, 2006.
URL : https://hal.archives-ouvertes.fr/lirmm-00202634
, Electrical Performances of a New Multipolar Micro-Stimulator, IFESS'05 : 10th Annual Conference of the International Functional Electrical Stimulation Society, pp.232-234, 2005.
URL : https://hal.archives-ouvertes.fr/lirmm-00106475
, A Broadband Active Frequency Doubler Operating up to 120 ghz, EuMC'05 : 35th European Microwave Conference, 2005.
URL : https://hal.archives-ouvertes.fr/lirmm-00406824
, A DC-100 GHz Frequency Doubler in InP DHBT Technology, IEEE MTT-S International Microwave Symposium Digest, pp.167-170, 2004.
URL : https://hal.archives-ouvertes.fr/lirmm-00108815
, New implantable stimulator for the FES of paralyzed muscles, Proceedings of the 30th European Solid-State Circuits Conference, pp.455-458, 2004.
DOI : 10.1109/ESSCIR.2004.1356716
URL : https://hal.archives-ouvertes.fr/lirmm-00108820
, A new methodology for adc test flow optimization, International Test Conference, 2003. Proceedings. ITC 2003., pp.201-209, 2003.
DOI : 10.1109/TEST.2003.1270841
URL : https://hal.archives-ouvertes.fr/lirmm-00269610
, A high accuracy triangle-wave signal generator for on-chip ADC testing, Proceedings The Seventh IEEE European Test Workshop, pp.89-94, 2002.
DOI : 10.1109/ETW.2002.1029644
URL : https://hal.archives-ouvertes.fr/lirmm-00268483
, Implementation of a linear histogram BIST for ADCs, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, pp.590-595, 2001.
DOI : 10.1109/DATE.2001.915083
, A low-cost adaptive ramp generator for analog BIST applications, Proceedings 19th IEEE VLSI Test Symposium. VTS 2001, pp.266-271, 2001.
DOI : 10.1109/VTS.2001.923449
, Analog BIST generator for ADC testing, Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp.338-346, 2001.
DOI : 10.1109/DFTVS.2001.966787
, Towards an ADC BIST scheme using the histogram test technique, Proceedings IEEE European Test Workshop, pp.53-58, 2000.
DOI : 10.1109/ETW.2000.873779
, Hardware resource minimization for histogram-based ADC BIST, Proceedings 18th IEEE VLSI Test Symposium, pp.247-252, 2000.
DOI : 10.1109/VTEST.2000.843852
, LH-Bist for digital correction of ADC offset, 2009 4th International Conference on Design & Technology of Integrated Systems in Nanoscal Era, pp.199-203, 2009.
DOI : 10.1109/DTIS.2009.4938055
URL : https://hal.archives-ouvertes.fr/lirmm-00375659
, Low-noise averaging amplifier dedicated to ENG recording with hexagonal cuff electrode, 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference, pp.161-164, 2008.
DOI : 10.1109/NEWCAS.2008.4606346
URL : https://hal.archives-ouvertes.fr/lirmm-00336369
, Dependability for Implanted Medical Devices, DECIDE'08 : Second International Workshop on Dependable Circuit Design, 2008.
URL : https://hal.archives-ouvertes.fr/lirmm-00370666
, Power Supply Investigation for Wireless Wafer Test, LATW'08 : 9th Latin-American Test Workshop, pp.165-170, 2008.
URL : https://hal.archives-ouvertes.fr/lirmm-00260205
, A Cuff Electrode Dedicated to ENG Recording with Multipolar Configuration for Both Efficient Sensitivity and High Rejection of EMG Parasitic Signals, 9th Vienna International Workshop on Functional Electrical Stimulation, pp.78-81, 2007.
URL : https://hal.archives-ouvertes.fr/lirmm-00176528
, Fully-Efficient ADC Test Technique for ATE with Low Resolution Arbitrary Wave Generators, IM- STW'07 : International Mixed-Signals Testing Workshop, pp.196-201, 2007.
URL : https://hal.archives-ouvertes.fr/lirmm-00161708
, Testing system-in-package wirelessly, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006., pp.222-226, 2006.
DOI : 10.1109/DTIS.2006.1708683
URL : https://hal.archives-ouvertes.fr/lirmm-00102751
, Experimental Validation of theAnalogue Network of Converters" Technique to Test Complex SiP/SoC, IMSTW'06 : IEEE International Mixed-Signals Testing Workshop, pp.84-88, 2006.
, Testing system-in-package wirelessly, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006., pp.73-78, 2006.
DOI : 10.1109/DTIS.2006.1708683
URL : https://hal.archives-ouvertes.fr/lirmm-00102751
, Fast and Fully-Efficient Test Flow for ADCs, IMSTW'05 : 11th IEEE International Mixed-Signals Testing Workshop, pp.244-249, 2005.
URL : https://hal.archives-ouvertes.fr/lirmm-00106523
, Built-in-test solutions for sip, KGD'05 : KGD Packaging & Test Workshop, pp.105-109, 2005.
, Comparison Between Spectral-Based Methods for INL Estimation and Feasibility of Their Implantation, IMSTW'05 : 11th IEEE International Mixed-Signal Testing Workshop, pp.270-275, 2005.
URL : https://hal.archives-ouvertes.fr/hal-00092461
, An implantable asic for neural stimulation, IEEE International Workshop on Biomedical Circuits and Systems, 2004., pp.1-7, 2004.
DOI : 10.1109/BIOCAS.2004.1454173
URL : https://hal.archives-ouvertes.fr/lirmm-00108827
, An Automatic Tool for Generation of ADC BIST Architecture, IMSTW'03 : 9th IEEE International Mixed-Signals Testing Workshop, pp.79-84, 2003.
URL : https://hal.archives-ouvertes.fr/lirmm-00269580
, Automatic Generation of LH-BIST Architecture for ADC Testing, IWADC'03 : IEEE International Workshop on ADC Modelling and Testing, pp.7-12, 2003.
URL : https://hal.archives-ouvertes.fr/lirmm-00269683
, A New Methodology for ADC Test Flow Optimization, ETW'03 : IEEE European Test Workshop, pp.75-80, 2003.
URL : https://hal.archives-ouvertes.fr/lirmm-00269610
, Analysis of the Specification Influence on the Efficiency of an Optimized Test Flow for ADCs, IMSTW'03 : 9th IEEE International Mixed-Signals Testing Workshop, pp.185-190, 2003.
URL : https://hal.archives-ouvertes.fr/lirmm-00269583
, On the Efficiency of Measuring ADC Dynamic Parameters to Detect ADC Static Errors, LATW'03 : 4th IEEE Latin American Test Workshop, pp.198-203, 2003.
URL : https://hal.archives-ouvertes.fr/lirmm-00269498
, Evaluation of ADC Static Parameters via Frequency Domain, IMSTW'02 : 8th IEEE International Mixed-Signal Testing Workshop, pp.165-169, 2002.
, Estimating Static Parameters of A-to-D Converters from Spectral Analysis, LATW'02 : 3rd IEEE Latin American Test Workshop, pp.174-179, 2002.
, On the Evaluation of ADC Static Parameters Through Dynamic Testing, ADDA&EWADC'02 : Advanced A/D and D/A Conversion Techniques and Their Applications & ADC Modelling and Testing, pp.95-98, 2002.
URL : https://hal.archives-ouvertes.fr/lirmm-00269338
, On-chip generation of highquality ramp stimulus with minimal silicon area, LATW'01 : atin American Test Workshop, pp.112-117, 2001.
, On-chip generator of a saw-tooth test stimulus for ADC BIST, IFIP International Conference on Very Large Scale Integration The Global System on Chip Design & CAD Conference, pp.347-352, 2001.
DOI : 10.1007/978-0-387-35597-9_36
, Efficient on-chip generator for linear histogram bist of adcs, IMSTW'01 :International Mixed-Signal Testing Workshop, pp.89-96, 2001.
, Sinusoidal histogram-based bist for adc testing, DCIS'00 : Design of Integrated Circuits and Systems, pp.21-24, 2000.
, Linear histogram test for adcs a bist implementation, IMSTW'00 : Mixed-Signal Testing Workshop, pp.40-45, 2000.
, Minimization the hardware overhead of a histogram-based bist scheme for analog-to-digital converters, LATW'00 : Latin American Test Workshop, pp.118-122, 2000.
, Test Mixte : 5 Centres de Compétence pour la Formation en Europe, CNFM'04 : 8ème Journées Pédagogiques du Comité National de Formation en Microélectronique, p.242, 2004.
, EuNICE-Test Project : A remote Access to Engineering Test for European Universities, EWME'02 : European Workshop on MicroElectronics Education, pp.133-136, 2002.
URL : https://hal.archives-ouvertes.fr/lirmm-00268489
, European network for test education, Proceedings First IEEE International Workshop on Electronic Design, Test and Applications '2002, pp.230-239, 2002.
DOI : 10.1109/DELTA.2002.994620
URL : https://hal.archives-ouvertes.fr/lirmm-00268490
, A remote access to engineering test facilities for the distant education of European microelectronics students, 32nd Annual Frontiers in Education, pp.18-24, 2002.
DOI : 10.1109/FIE.2002.1157943
URL : https://hal.archives-ouvertes.fr/lirmm-00269423
, Test intégré de convertisseurs analogique numérique (can), " Revue interne "L'actualité Composants du CNES, pp.26-30, 2000.
, Contrat NanoTEST 2A702 -Programme CEE MEDEA -Rapport Technique de fin d'année, tech. rep, 2007.
, Advanced Solutions for Innovative SOC Testing in Europe, tech. rep, 2004.
URL : https://hal.archives-ouvertes.fr/lirmm-00109190
, Advanced Solutions for Innovative SOC Testing in Europe, Contrat CEE ASSOCIATE A503, Programme MEDEA+, 2003.
URL : https://hal.archives-ouvertes.fr/lirmm-00109190
, Project Management and Trainer Education Deliverable : Management Report, Attendees and Training Contents, Training Evaluation, tech. rep, 2002.
URL : https://hal.archives-ouvertes.fr/lirmm-00268593
, Advanced Solutions for Innovative SOC Testing in Europe Rapport Technique de Fin d, tech. rep, p.106, 2002.
URL : https://hal.archives-ouvertes.fr/lirmm-00269749
, A new layout of multipolar recording cuff electrode for high electroneurograms spatial selectivity, Artificial Organs, 2007.
, Xor en technologie tbh inp pour les futures transmissions optiques à 40 gb/s, 14émes Journées Nationales Microondes, 2005.
URL : https://hal.archives-ouvertes.fr/lirmm-00406830
, Mesure des Paramètres Statiques des Convertisseurs A/N par une Analyse Spectrale, Colloque du GDR CAO de Circuits et Systèmes Intégrés, pp.47-50, 2002.
, Test Intégré pour Convertisseurs Analogique-Numérique, 2001.
, Faisabilité de l'intégration du test par histogramme des can, 1998.
, Implementation of a linear histogram BIST for ADCs, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, pp.590-595, 2001.
DOI : 10.1109/DATE.2001.915083
, Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC, IET Computers & Digital Techniques, vol.1, issue.3, pp.146-153, 2007.
DOI : 10.1049/iet-cdt:20060136
, New electrode layout for internal selectivity of nerves, 2009 Annual International Conference of the IEEE Engineering in Medicine and Biology Society, pp.307-316, 1991.
DOI : 10.1109/IEMBS.2009.5334437
URL : https://hal.archives-ouvertes.fr/lirmm-00413454
, A signature analyzer for analog and mixed-signal circuits, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors
DOI : 10.1109/ICCD.1994.331906
, A Simplified Polynomial-Fitting Algorithm for, Proc. Internatiunal Test Conference, pp.389-395, 1997.
, A built-in self-test for ADC and DAC in a single-chip speech CODEC, Proceedings of IEEE International Test Conference, (ITC), pp.91-796, 1993.
DOI : 10.1109/TEST.1993.470623
, A BIST scheme for a SNR, gain tracking, and frequency response test of a sigma-delta ADC, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.42, issue.1, p.15, 1995.
DOI : 10.1109/82.363546
, A frequency response, harmonic distortion, and intermodulation distortion test for BIST of a sigma-delta ADC, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.43, issue.8, pp.608-613, 1996.
DOI : 10.1109/82.532008
, Efficient and accurate testing of analog-to-digital converters using oscillation-test method, Proceedings European Design and Test Conference. ED & TC 97
DOI : 10.1109/EDTC.1997.582381
, Built-in self-test methodology for A/D converters, Proceedings European Design and Test Conference. ED & TC 97, pp.353-358, 1997.
DOI : 10.1109/EDTC.1997.582382
, DSP-based Testing of Analog and Mixed- Signal Integrated Circuits, Proctdt et dispositif de test inttgri pour un CAN, pp.1-911304, 1999.
, Hardware resource minimization for histogram-based ADC BIST, Proceedings 18th IEEE VLSI Test Symposium, 2000.
DOI : 10.1109/VTEST.2000.843852
, Analog Signal Generation for Built-n Self-Test of Mixed-Signal Integrated Circuits, pp.84-91, 1987.
DOI : 10.1007/978-1-4615-2341-3
, A BIST scheme for an SNR test of a sigma-delta ADC, Proceedings of IEEE International Test Conference, (ITC), pp.17-21
DOI : 10.1109/TEST.1993.470621
, A BIST technique for a frequency response and intermodulation distortion test of a sigma-delta ADC, Proceedings of IEEE VLSI Test Symposium, pp.25-28
DOI : 10.1109/VTEST.1994.292333
, Hybrid Built In Self Test (HBIST) for Mixed Analog/Digital Integrated Circuits, Proc. European Test Conference, pp.307-323, 1991.
, A simplified polynomial-fitting algorithm for, Proc. IEEE International Test Conference, pp.389-395, 1997.
, Towards an ADC BIST scheme using the histogram test technique, Proceedings IEEE European Test Workshop, pp.53-58, 2000.
DOI : 10.1109/ETW.2000.873779
, Implementation of a linear histogram BIST for ADCs, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001, 2001.
DOI : 10.1109/DATE.2001.915083
, A New Built-in Self-test Approach For Digital-to-analog And Analog-to-digital Converters, IEEE/ACM International Conference on Computer-Aided Design, 1994.
DOI : 10.1109/ICCAD.1994.629860
, A signature analyzer for analog and mixed-signal circuits, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors, pp.284-287, 1994.
DOI : 10.1109/ICCD.1994.331906
, [10] Datasheet of PNX8327 Reducing Measurement Uncertainty in a DSP-Based Mixed-Signal Test Environment without Increasing Test Time, Proceedings. International Test Conf, pp.953-962, 1987.
, Frequency domain testing of ADC's Design & Test of Computers, IEEE, vol.13, issue.1s, pp.64-69, 1996.
, Estimation of A/D Converter Nonlinearities from complex Spectrum, Proc. International Workshop on ADC Modeling and Testing, pp.8-10
, A New Approach for the Nonlinearity Test of ADC's/DAC's and its application for BIST, Proc. IEEE European Test Workshop, pp.34-39, 1999.
, Dither Incorporated Deterministic Dynamic Element Matching for High Resolution ADC Test Using Extremely Low Resolution DAC's " Circuits and Systems, ISCAS 2005. IEEE International Symposium on 23-26, pp.4285-4288, 2005.
, FFT Test of A/D Converters to Determine the Integral Nonlinearity, IEEE Trans. Instrum. Meas, vol.51, issue.5, pp.1050-1054, 2002.
, Integrated circuit amplifiers for multi-electrode intracortical recording, Journal of Neural Engineering, vol.6, issue.1, p.12001, 2009.
DOI : 10.1088/1741-2560/6/1/012001
, An implantable CMOS signal conditioning system for recording nerve signals with cuff electrodes, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353), pp.281-284, 2000.
DOI : 10.1109/ISCAS.2000.857419
, A low-power CMOS front-end for cuffrecorded nerve signals, Proceedings of the 22nd Norchip Conference, pp.24-27, 2004.
, Very Low-Noise ENG Amplifier System Using CMOS Technology, IEEE Transactions on Neural Systems and Rehabilitation Engineering, vol.14, issue.4, pp.427-437, 2006.
DOI : 10.1109/TNSRE.2006.886731
, Selective Recording of the Canine Hypoglossal Nerve Using a Multicontact Flat Interface Nerve Electrode, IEEE Transactions on Biomedical Engineering, vol.52, issue.8, pp.1461-1469, 2005.
DOI : 10.1109/TBME.2005.851482
, Functional electrical stimulation of the peroneal nerve for hemiplegia. Long-term clinical follow-up., The Journal of Bone & Joint Surgery, vol.67, issue.5, pp.792-793, 1985.
DOI : 10.2106/00004623-198567050-00016
, The Neuron Book, 2006.
DOI : 10.1017/CBO9780511541612
, Modeling the excitability of mammalian nerve fibers: Influence of afterpotentials on the recovery cycle, Journal of Neurophysiology, vol.87, pp.995-1006, 2002.
, Bioelectricity: A Quantitative Approach, 2007.
, Tripolar nerve cuff recording: stimulus artifact, EMG and the recorded nerve signal, Proceedings of 17th International Conference of the Engineering in Medicine and Biology Society, pp.1105-1106, 1995.
DOI : 10.1109/IEMBS.1995.579534
, Performance of alternative amplifier configurations for tripolar nerve cuff recorded ENG Bridging Disciplines for Biomedicine, Proceedings of the 18th Annual International Conference of the IEEE, pp.375-376, 1996.
, Multipolar Electrode and Preamplifier Design for ENG-Signal Acquisition, Biomedical Engineering Systems and Technologies, ser. Communications in Computer and Information Science, vol.14, issue.4, pp.148-159, 2009.
DOI : 10.1109/TNSRE.2006.886731
URL : https://hal.archives-ouvertes.fr/lirmm-00345755