Abstract : The work presented in this thesis takes place in a context of growing demand for better video quality (High-Definition TV, home cinema...) and unprecedented concern for power consumption. The limitations and lack of flexibility of current video standards make it increasingly long and complicated to implement standards on embedded systems. A new standard called Reconfigurable Video Coding aims to solve these problems by describing video coding with dataflow programs. A dataflow program is a program represented as a directed graph where vertices are computational units and edges represent the flow of data between vertices. This thesis presents a compilation infrastructure for dataflow programs that can compile these programs to a simple, high-level Intermediate Representation (IR). We show how this IR can be used to analyze, transform, and generate code for dataflow programs in many languages, from C to hardware description languages.