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Modèles de simulation pour la validation logicielle et l'exploration d'architectures des systèmes multiprocesseurs sur puce

Abstract : Current Multi-Processor System-On-Chips (MPSoCs) architectures benefit from the heterogeneous multiprocessor platforms to fit consumption and performance requirements while keeping software flexibility. The dominance of software in MPSoCs compel designers to start the software validation and integration with hardware in the earlier steps of the design flow in order to achieve a short time-to-market. The contributions of this thesis are (1) the proposition of a methodology to model simulation platforms based on the native execution of the software, (2) an instrumentation techniques that allow the annotation of the embedded software. These simulation platforms allow the execution of almost all parts of the final software (including the operating system) on top of realistic hardware architecture models of the targeted system. Combined with the instrumentation technique, these platforms allow to precisely consider physical quantities such as the execution time or the electrical consumption related to the software execution.
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https://tel.archives-ouvertes.fr/tel-00558777
Contributor : Lucie Torella <>
Submitted on : Monday, January 24, 2011 - 10:55:26 AM
Last modification on : Friday, December 11, 2020 - 8:28:04 AM
Long-term archiving on: : Tuesday, November 6, 2012 - 12:05:35 PM

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  • HAL Id : tel-00558777, version 1

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P. Gerin. Modèles de simulation pour la validation logicielle et l'exploration d'architectures des systèmes multiprocesseurs sur puce. Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 2009. Français. ⟨tel-00558777⟩

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