Conception d'architectures reconfigurables dynamiquement : Du silicium au système

Sébastien Pillement 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
IRISA-D3 - ARCHITECTURE, Inria Rennes – Bretagne Atlantique
Abstract : The research presented in this manuscript focus on the design of dynamically reconfigurable systems. Constant evolution of applications and the ever increasing need for performance require the development of new efficient and flexible architectures. These constraints have led to more complex architectures, their reconfiguration mechanisms and management. In the first part of our work, we propose architectures providing a good compromise between performance, power consumption, and flexibility. To simplify the design of these architectures and their management, we have proposed a high level description language that allows to generate the architecture but also set up its development flow. The modern SoCs include a large number of heterogeneous features, and face problems due to technology shrink. To meet these challenges, the concept of integrated network on silicon seems promising. In our second line, we are studying new coding and new technologies to reduce consumption of interconnects while improving their reliability. We are also working to define flexible networks adapted to the dynamic reconfiguration paradigm. The emergence of reconfigurable systems requires the use of specific tools and mechanisms. In particular, the presence of a dedicated operating system becomes necessary. It would provide services such as tasks scheduling, communications management and provide a model independent of the target architecture for applications deployment. The second issue of this axis is the need to develop fault-tolerant architectures. Thus the establishment of specific management can develop reliable dynamically reconfigurable systems.
Document type :
Habilitation à diriger des recherches
Micro et nanotechnologies/Microélectronique. Université Rennes 1, 2010
Contributor : Sébastien Pillement <>
Submitted on : Monday, January 10, 2011 - 2:45:23 PM
Last modification on : Monday, May 18, 2015 - 11:54:47 AM
Document(s) archivé(s) le : Monday, November 5, 2012 - 3:55:31 PM



  • HAL Id : tel-00554210, version 1



Sébastien Pillement. Conception d'architectures reconfigurables dynamiquement : Du silicium au système. Micro et nanotechnologies/Microélectronique. Université Rennes 1, 2010. <tel-00554210>




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