Contribution à la gestion dynamique de ressource reconfigurable intégrée au sein d'un MPSoC

Daniel Chillet 1
1 CAIRN - Energy Efficient Computing ArchItectures with Embedded Reconfigurable Resources
Inria Rennes – Bretagne Atlantique , IRISA-D3 - ARCHITECTURE
Abstract : In recent years, significant progress in all areas of electronic and information technologies has been observed. The steady miniaturization of semiconductor components and progress in manufacturing technologies have allowed to fabricate integrated circuits containing billions of transistors. These evolutions, which have allowed to put a large number of hardware and software components in a single integrated circuit, have led to the definition of a new paradigm known as the System-on-Chip (SoC). Flexibility is one of the most important requirements for embedded applications which allows to adapt their functionalities depending on environment. To dynamically adapt system functionalities to changing conditions, Reconfigurable Systems-on-Chip (RSoC) containing a variety of reconfigurable resources are more and more frequently used. The management of tasks and resources of RSoC is generally ensured by an operating system which grants access to available RSoC resources (processors, memories, communication systems) without any particular knowledge about their hardware implementations. Nevertheless, because the classical operating systems are not adapted to manage reconfigurable resources, therefore some services provided by operating systems must be modified to support the reconfiguration paradigm. In this research, various topics on management of reconfigurable resources of RSoCs are presented. One deals with memory organization and reconfigurable memory hierarchy. The second deals with the problem of task scheduling onto reconfigurable resources as well as with the task placement. Finally, some aspects of system modelling, which becomes more and more important because of significant growing complexity of the systems, are presented.
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  • HAL Id : tel-00509892, version 2

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Daniel Chillet. Contribution à la gestion dynamique de ressource reconfigurable intégrée au sein d'un MPSoC. Traitement du signal et de l'image [eess.SP]. Université Rennes 1, 2010. ⟨tel-00509892v2⟩

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