Ordonnancements périodiques dans les réseaux de processus : Application à la conception insensible aux latences

Jean-Vivien Millo 1
1 AOSTE - Models and methods of analysis and optimization for systems with real-time and embedding constraints
CRISAM - Inria Sophia Antipolis - Méditerranée , Inria Paris-Rocquencourt, Laboratoire I3S - COMRED - COMmunications, Réseaux, systèmes Embarqués et Distribués
Abstract : Due to the increasing scaling of digital system, System-on-Chip (SoC) design deals with latencies problem on long wire interconnection through the whole chip. A SoC is a set of IP components communicating together. While the communication inside the IP component can still be considered synchronous (abstracted as instantaneous action), the communication between IP components should not. Many clock cycles occur between sending and reception of a data on an interconnexion wire. The theory of Latency Insensitive Design (LID) created by L. Carloni and A. Sangiovanni-Vincentelli solves this problem by implementing a communication protocol based on segmentation of interconnection wire and back pressure in case of local traffic jam. In the first time, we'll give theoretical basis of LID theory by formally linking it to the deterministic model of Marked/Event graph (conflict free subset of Petri net), and limiting the capacity of places by 2; which naturally implement the back pressure protocol. This model drive us to the main problem of this work: How to minimize the size of memory resources used as buffer through the interconnection wires? Because their quantity and location should become critical at implementation. Then we'll study this problem with the natural hypothesis of determinism. This allow the system to have regular and periodic behaviour. The goal of this work is to modify the LID theory by taking care of this hypothesis. the study of deterministic systems and previous results lead us to a first modification step called: Equalization. Next step consist in statically schedule these system. We chose to explicitly represent schedule of each element of the system using periodic binary word (1 for activity, 0 for stalling) such M. Pouzet and al. introduce it in "N-synchronous Kahn network". A study of different classes of binary word (Sturm, Christoffel, Lyndon, Mechanical words) was prior to their association to LID theory and {\em Equalization} process. We obtained statically scheduled systems which answered to the main problem of this work.
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Jean-Vivien Millo. Ordonnancements périodiques dans les réseaux de processus : Application à la conception insensible aux latences. Réseaux et télécommunications [cs.NI]. Université Nice Sophia Antipolis, 2008. Français. ⟨tel-00507498⟩



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