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Modélisation de défauts paramétriques en vue de tests statiques et dynamiques

Nicolas Houarche 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Due to integration density evolution and the high complexity of manufacturing process for integrated circuits, failures which can not be modeled by simple stuck at faults become preponderant. This thesis deals particularly with failures caused by physical defects. The result of such a defect is either a connection of two independent nodes in a fault-free circuit or a deterioration of an interconnection. Two parametrical defects are studied in this thesis: resistive opens and resistive shorts. The unknown resistance of these defects is the major parameter of their model. The first part deals with resistive opens. From a deep electrical analysis of their dynamical behavior, a fault simulator has been developed and validated with benchmark circuits and Automatic Test Pattern Generator (ATPG) specifications are proposed. In the second part, resistive shorts have been analyzed and a mathematical model which represents the dynamical behavior is proposed and validated.
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Submitted on : Thursday, May 6, 2010 - 5:41:29 PM
Last modification on : Thursday, May 24, 2018 - 3:59:24 PM
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  • HAL Id : tel-00481534, version 1



Nicolas Houarche. Modélisation de défauts paramétriques en vue de tests statiques et dynamiques. Micro et nanotechnologies/Microélectronique. Université Montpellier II - Sciences et Techniques du Languedoc, 2009. Français. ⟨tel-00481534⟩



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