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Adéquation arithmétique architecture, problèmes et étude de cas

Abstract : Nowadays, computers offer more and more arithmetic functions wired in hardware. Last generations of processors integrate fast hardware operators to evaluate divisions, square roots, sines, cosines, logarithms... Many references in computer arithmetic stress on the fact that changing number representation and/or using specific algorithms make it possible to build very efficient hardware operators. The goal in this thesis is to investigate and illustrate the fundmental links between computer arithmetic and computer architecture through four real problems. Self-Timed Circuits evaluate the arithmetic functions with variable input-dependent computation time. We have developed low complexity asynchronous adders, including a space efficient adder with average computation time of O(sqrt(log n)). With On-Line Arithmetic, numbers flow serially, one digit each clock cycle, most significant digit first. All the functions can be implemented with on-line arithmetic whereas common serial arithmetic, least significant digit first, is restricted to addition and multiplication. I described in VHDL a set of on-line operators much smaller that require less I/O pads than their parallel counterpart. To attain Exact Rounding of the Elementary Functions one has to estimate the appropriate internal precision required for each function (sine, cosine...). We detail here a method which allow reasonnably fast exact rounding of the elementary functions. The Semi-Logarithmic Number System is an hybrid notation that allows fast average computation in problems even in the presence of a high number of multiplications and divisions compared to the number of additions and subtractions.
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https://tel.archives-ouvertes.fr/tel-00445752
Contributor : Arnaud TISSERAND Connect in order to contact the contributor
Submitted on : Monday, January 11, 2010 - 11:46:01 AM
Last modification on : Thursday, September 29, 2022 - 2:58:07 PM
Long-term archiving on: : Thursday, June 17, 2010 - 10:36:15 PM

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  • HAL Id : tel-00445752, version 1

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Arnaud Tisserand. Adéquation arithmétique architecture, problèmes et étude de cas. Informatique [cs]. Ecole normale supérieure de lyon - ENS LYON, 1997. Français. ⟨tel-00445752⟩

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