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Etude de méthodes et mécanismes pour un accès transparent et efficace aux données dans un système multiprocesseur sur puce

Abstract : In order to provide evermore computational power, architects integrates dozen of processors in the same chip. The main goal of our work is to enhance data accesses using software-seamless solutions. Our context targets NoC based muliprocessor systems which contains L1 caches and distributed shared memory. In a first part, we show that the constraints evolution in embedded systems makes possible the usage of a write-through invalidate coherence protocol in such systems. We present also a novel method to evaluate and compare memory coherence protocols. In the second part we present a novel solution for on-chip data migration. It is hardware driven, and it dynamically and wisely places the data in order to decrease the mean cost access to memory.
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https://tel.archives-ouvertes.fr/tel-00434379
Contributor : Lucie Torella <>
Submitted on : Monday, November 23, 2009 - 10:29:56 AM
Last modification on : Friday, December 11, 2020 - 8:28:03 AM
Long-term archiving on: : Thursday, June 17, 2010 - 6:29:01 PM

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  • HAL Id : tel-00434379, version 1

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P. Guironnet de Massas. Etude de méthodes et mécanismes pour un accès transparent et efficace aux données dans un système multiprocesseur sur puce. Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 2009. Français. ⟨tel-00434379⟩

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