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Evaluation de Back-End Of Line Optimisés pour les Inductances Intégrées en Technologies CMOS et BiCMOS Avancées visant les Applications Radiofréquences

Abstract : Integrated in BEOL metallizations of CMOS or BiCMOS technologies, inductors have to meet requirements in terms of high electrical performances, low area and/or high current capability. However, this challenge is tricky to address. Actually, BEOL evolution and silicon substrate losses in Advanced CMOS technologies greatly decrease inductors' performances. Thus, the evaluation of optimized BEOL dedicated to the integration of inductors is essential if we want to target RF applications' specifications.
The main objective of this thesis is to provide optimized technological solutions for inductors integrated in silicon technologies, and targeting RF applications in the 1 - 5 GHz frequency range.
A dummy fill strategy has been evaluated at the scale of the device (without impacting its electrical performances) in order to fulfil metal density required in advanced technologies (down to the 32 nm node).
Then, we have focused our attention on the evaluation of an optimized BEOL using a Double Thick Copper module in a 65 nm CMOS bulk technology. Actually, the wish to integrate the module dedicated to the power amplifier in CMOS technology has raised high current issues (up to 1 A @ 125°C), which is impossible to target with a standard BEOL.
In the same trend, this optimized BEOL has been evaluated in SOI technology. Actually, this technology is starting to come up for the complete integration of the RF Front End module in CMOS technology thanks to its compatibility with HR silicon substrates which enables to integrate even more functions (antennas, diplexer, balun). Thus, inductor's optimization using a Double Thick Copper module has been performed in a 130 nm HR SOI CMOS technology.
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Contributor : Carine Pastore <>
Submitted on : Sunday, April 17, 2011 - 7:00:06 AM
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Carine Pastore. Evaluation de Back-End Of Line Optimisés pour les Inductances Intégrées en Technologies CMOS et BiCMOS Avancées visant les Applications Radiofréquences. Micro et nanotechnologies/Microélectronique. Université Joseph-Fourier - Grenoble I, 2009. Français. ⟨tel-00376382⟩

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