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Test et Diagnostic de Fautes Dynamiques dans les Mémoires SRAM

Alexandre Ney 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Nowadays, embedded memories occupy a large part of the System-on-Chip (SoC) silicon area. Consequently, memories are the main responsible for the overall Systemon- Chip yield. However, a high integration density and the complexity of the fabrication process make memories more and more prone to manufacturing defects. Therefore, efficient test and diagnostic solutions for memories are required. Current test solutions used for SRAM memories are oriented to static fault detection. Recent researches show that VDSM (Very Deep SubMicron) technologies more frequently involve dynamic faults. These faults, mainly due to bad vias or contacts involving a resistive-path, need a specific pattern to be sensitized. However, classical test solutions are not able to deal with such behaviors. Consequently, the first part of this thesis is dedicated to new test solutions allowing to detect dynamic faults due to resistive-open defects in the memory. Especially, we focus our study on the write driver and the sense amplifier. New fault models and March test solutions are proposed. Then, extension on dynamic faults is provided: a brief study on the impact of the threshold voltage variation is given. Finally, the next part of this thesis is oriented toward memory diagnostic. New efficient algorithmic diagnosis solutions are proposed. They allow dealing with dynamic faults and providing information on the faulty bloc location. This thesis has been done in the framework of the Associate MEDEA project in cooperation with Infineon Technologies.
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Contributor : Martine Peridier <>
Submitted on : Tuesday, November 25, 2008 - 4:43:35 PM
Last modification on : Thursday, May 24, 2018 - 3:59:24 PM
Long-term archiving on: : Monday, June 7, 2010 - 9:59:49 PM


  • HAL Id : tel-00341677, version 1



Alexandre Ney. Test et Diagnostic de Fautes Dynamiques dans les Mémoires SRAM. Sciences de l'ingénieur [physics]. Université Montpellier II - Sciences et Techniques du Languedoc, 2008. Français. ⟨tel-00341677⟩



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