A root of less evil [digital signal processing, IEEE Signal Processing Magazine, vol.22, issue.2, pp.93-96, 2005. ,
DOI : 10.1109/MSP.2005.1406500
Accurate math functions on the Intel IA-32 architecture : A performance-driven design, 7th Conference on Real Numbers and Computers, pp.93-105, 2006. ,
Standard 754-1985 for Binary Floating-Point Arithmetic (also IEC 60559), 1985. ,
Applying features of IEEE 754 to sign/logarithm arithmetic, IEEE Transactions on Computers, vol.41, issue.8, pp.411040-1050, 1992. ,
DOI : 10.1109/12.156547
A library of parameterized floating-point modules and their use, Field Programmable Logic and Applications, pp.657-666, 2002. ,
Small Multiplier-Based Multiplication and Division Operators for Virtex-II Devices, Field-Programmable Logic and Applications, 2002. ,
DOI : 10.1007/3-540-46117-5_54
URL : https://hal.archives-ouvertes.fr/inria-00072094
Preuves formelles en arithmétiques à virgule flottante, Thése de doctorat, 2004. ,
A mechanically-validated technique for extending the available precision, Conference Record of Thirty-Fifth Asilomar Conference on Signals, Systems and Computers (Cat.No.01CH37256), 2001. ,
DOI : 10.1109/ACSSC.2001.987700
A Simple Test Qualifying the Accuracy of Horner'S Rule for Polynomials, Numerical Algorithms, vol.37, issue.1-4, pp.45-60, 2004. ,
DOI : 10.1023/B:NUMA.0000049487.98618.61
Field-programmable logic: Catalyst for new computing paradigms, International Workshop on Field Programmable Logic and Applications, 1998. ,
DOI : 10.1007/BFb0055232
A Fortran Multiple-Precision Arithmetic Package, ACM Transactions on Mathematical Software, vol.4, issue.1, pp.57-70, 1978. ,
DOI : 10.1145/355769.355775
Efficient polynomial L-approximations, 18th IEEE Symposium on Computer Arithmetic (ARITH '07), pp.169-176, 2007. ,
DOI : 10.1109/ARITH.2007.17
URL : https://hal.archives-ouvertes.fr/inria-00119513
Floating-point L^2 -approximations to functions, 18th IEEE Symposium on Computer Arithmetic (ARITH '07), pp.177-184, 2007. ,
DOI : 10.1109/ARITH.2007.38
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.162.2773
Computing machine-efficient polynomial approximations, ACM Transactions on Mathematical Software, vol.32, issue.2, pp.236-256, 2006. ,
DOI : 10.1145/1141885.1141890
URL : https://hal.archives-ouvertes.fr/ensl-00086826
Hardware operators for function evaluation using sparse-coefficient polynomials, Electronics Letters, vol.42, issue.25, pp.1441-1442, 2006. ,
DOI : 10.1049/el:20062373
URL : https://hal.archives-ouvertes.fr/lirmm-00125483
Fast integer multipliers fit in FPGAs (EDN 1993 design idea winner) EDN magazine, 1994. ,
Certified infinite norm using interval arithmetic, SCAN 2006 -12th GAMM -IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics, 2006. ,
Arithmetic on the European logarithmic microprocessor, IEEE Transactions on Computers, vol.49, issue.7, pp.702-715, 2000. ,
DOI : 10.1109/12.863040
Scientific Computing on Itanium-based Systems, 2002. ,
The FELIN arithmetic coprocessor chip, 1987 IEEE 8th Symposium on Computer Arithmetic (ARITH), pp.107-112, 1987. ,
DOI : 10.1109/ARITH.1987.6158691
URL : https://hal.archives-ouvertes.fr/hal-00014979
Faithful bipartite ROM reciprocal tables, 12th Symposium on Computer Arithmetic, pp.17-28, 1995. ,
Expansions : lightweight multiple precison arithmetic, Architecture and Arithmetic Support for Multimedia, 1998. ,
Division of floating point expansions with an application to the computation of a determinant, Journal of Universal Computer Science, vol.5, issue.6, pp.323-338, 1999. ,
The price of routing in FPGAs, Journal of Universal Computer Science, vol.6, issue.2, pp.227-239, 2000. ,
URL : https://hal.archives-ouvertes.fr/inria-00072889
Software carry-save : A case study for instruction-level parallelism, Seventh International Conference on Parallel Computing Technologies, 2003. ,
Fast correct rounding of elementary functions in double precision using double-extended arithmetic, 2004. ,
URL : https://hal.archives-ouvertes.fr/inria-00071446
Multipartite tables in JBits for the evaluation of functions on FPGAs, IEEE Reconfigurable Architecture Workshop, International Parallel and Distributed Symposium, 2002. ,
Towards the Post-Ultimate libm, 17th IEEE Symposium on Computer Arithmetic (ARITH'05), pp.288-295, 2005. ,
DOI : 10.1109/ARITH.2005.46
URL : https://hal.archives-ouvertes.fr/inria-00070636
Assisted verification of elementary functions using Gappa, Proceedings of the 2006 ACM symposium on Applied computing , SAC '06, pp.1318-1322, 2006. ,
DOI : 10.1145/1141277.1141584
Fast and correctly rounded logarithms in double-precision, Theoretical Informatics and Applications, pp.85-102, 2007. ,
DOI : 10.1051/ita:2007003
URL : https://hal.archives-ouvertes.fr/inria-00070331
Constant multipliers for FPGAs, Parallel and Distributed Processing Techniques and Applications, pp.167-173, 2000. ,
URL : https://hal.archives-ouvertes.fr/ensl-00269219
Software techniques for perfect elementary functions in floating-point interval arithmetic, Real Numbers and Computers, 2006. ,
Massive tracking on heterogeneous platforms, 9th International Computational Accelerator Physics Conference (ICAP), 2006. ,
Multipartite table methods, IEEE Transactions on Computers, vol.54, issue.3, pp.319-330, 2005. ,
DOI : 10.1109/TC.2005.54
URL : https://hal.archives-ouvertes.fr/ensl-00542210
Cache-optimised methods for the evaluation of elementary functions, 2002. ,
Fonctions élémentaires : algorithmes et implémentations efficaces pour l'arrondi correct en double précision, Thése de doctorat, 2003. ,
Collapsing dependent floating point operations, 2004. ,
SOFTWARE CARRY-SAVE FOR FAST MULTIPLE-PRECISION ALGORITHMS, Mathematical Software, 2002. ,
DOI : 10.1142/9789812777171_0004
A new scheme for table-based evaluation of functions, Conference Record of the Thirty-Sixth Asilomar Conference on Signals, Systems and Computers, 2002., 2002. ,
DOI : 10.1109/ACSSC.2002.1197049
URL : https://hal.archives-ouvertes.fr/inria-00071948
Proposal for a standardization of mathematical function implementations in floating-point arithmetic. Numerical algorithms, pp.1-4367, 2004. ,
DPGA-coupled microprocessors: commodity ICs for the early 21st Century, Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines, 1994. ,
DOI : 10.1109/FPGA.1994.315596
A floating-point technique for extending the available precision, Numerische Mathematik, vol.5, issue.3, pp.224-242, 1971. ,
DOI : 10.1007/BF01397083
Floating-point sparse matrix-vector multiply for FP- GAs, Field-Programmable Gate Arrays, pp.75-85, 2005. ,
Arithmétiques réelles sur FPGA ; Virgule fixe, virgule flottante et système logarithmique, Thése de doctorat, 2007. ,
Second Order Function Approximation Using a Single Multiplication on FPGAs, 14th Intl Conference on Field-Programmable Logic and Applications (LNCS 3203), pp.221-230, 2004. ,
DOI : 10.1007/978-3-540-30117-2_24
Outils pour une comparaison sans a priori entre arithmétique logarithmique et arithmétique flottante, pp.625-643, 2005. ,
A parameterizable floating-point logarithm operator for FPGAs, Conference Record of the Thirty-Ninth Asilomar Conference onSignals, Systems and Computers, 2005., 2005. ,
DOI : 10.1109/ACSSC.2005.1599948
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.163.9343
A parameterized floating-point exponential function for FPGAs, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005., 2005. ,
DOI : 10.1109/FPT.2005.1568520
Table-based polynomials for fast hardware function evaluation, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05), pp.328-333, 2005. ,
DOI : 10.1109/ASAP.2005.61
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.164.327
Opérateurs trigonométriques en virgule flottante sur FPGA, RenPar'17, SympA'2006, CFSE'5 et JC'2006, pp.96-105, 2006. ,
Parameterized floating-point logarithm and exponential functions for FPGAs, Microprocessors and Microsystems, 2007. ,
DOI : 10.1016/j.micpro.2006.02.008
URL : https://hal.archives-ouvertes.fr/ensl-00542213
A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic, The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, vol.23, issue.1, 2007. ,
DOI : 10.1007/s11265-007-0048-7
URL : https://hal.archives-ouvertes.fr/ensl-00542212
Return of the hardware floating-point elementary function, 18th IEEE Symposium on Computer Arithmetic (ARITH '07), pp.161-168, 2007. ,
DOI : 10.1109/ARITH.2007.29
URL : https://hal.archives-ouvertes.fr/ensl-00117386
A flexible floating-point format for optimizing data-paths and operators in FPGA based DSPs, Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays , FPGA '02, pp.50-55, 2002. ,
DOI : 10.1145/503048.503056
FPGA-Based Implementation of a Robust IEEE-754 Exponential Unit, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp.229-238, 2004. ,
DOI : 10.1109/FCCM.2004.38
64-bit floating-point FPGA matrix multiplication, Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays , FPGA '05, pp.86-95, 2005. ,
DOI : 10.1145/1046192.1046204
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.108.9463
Ecrire les nombres autrement pour calculer plus vite, Technique et Science Informatique, vol.10, issue.3, 1991. ,
Radix-16 Evaluation of Certain Elementary Functions, IEEE Transactions on Computers, vol.22, issue.6, pp.22561-566, 1973. ,
DOI : 10.1109/TC.1973.5009107
Division and Square Root : Digit-Recurrence Algorithms and Implementations, 1994. ,
Digital Arithmetic, 2003. ,
URL : https://hal.archives-ouvertes.fr/ensl-00542215
Interval Mathematical Library Based on Chebyshev and Taylor Series Expansion, Reliable Computing, vol.11, issue.5, pp.359-367, 2005. ,
DOI : 10.1007/s11155-005-0042-3
High bandwidth evaluation of elementary functions, 1981 IEEE 5th Symposium on Computer Arithmetic (ARITH), pp.139-142, 1981. ,
DOI : 10.1109/ARITH.1981.6159271
On Division by Functional Iteration, IEEE Transactions on Computers, vol.19, issue.8, pp.19154-161, 1970. ,
DOI : 10.1109/T-C.1970.223019
Advanced Computer Arithmetic Design, 2001. ,
Computing elementary functions: A new approach for achieving high accuracy and good performance, Accurate Scientific Computations, pp.1-16 ,
DOI : 10.1007/3-540-16798-6_1
An accurate elementary mathematical library for the IEEE floating point standard, ACM Transactions on Mathematical Software, vol.17, issue.1, pp.26-45, 1991. ,
DOI : 10.1145/103147.103151
Applications of division by convergence, Thése de Master, Electrical Engineering, Massachusetts Institute of Technology, 1964. ,
Analysis of high-performance floatingpoint arithmetic on FPGAs, Reconfigurable Architecture Workshop, Intl. Parallel and Distributed Processing Symposium, 2004. ,
Floating point verification in HOL light: The exponential function, Algebraic Methodology and Software Technology, pp.246-260, 1997. ,
DOI : 10.1007/BFb0000475
Formal Verification of Floating Point Trigonometric Functions, Formal Methods in Computer-Aided Design : Third International Conference FMCAD, pp.217-233, 2000. ,
DOI : 10.1007/3-540-40922-X_14
The computation of transcendental functions on the IA-64 architecture, Intel Technology Journal, p.4, 1999. ,
Function evaluation by table look-up and addition, Proceedings of the 12th Symposium on Computer Arithmetic, pp.10-16, 1995. ,
DOI : 10.1109/ARITH.1995.465382
An analysis of the double-precision floatingpoint FFT on FPGAs, 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), Avr, 2005. ,
Algorithms for quad-double precision floatingpoint arithmetic, 15th Symposium on Computer Arithmetic, pp.155-162, 2001. ,
DOI : 10.1109/arith.2001.930115
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.4.6352
FI_LIB, eine schnelle und portable Funktionsbibliothek für reelle Argumente und reelle Intervalle im IEEE-double-Format. Rapport de recherche Nr, 1998. ,
The Coq proof assistant : a tutorial : version 8, 2004. ,
Analysis of reciprocal and square root reciprocal instructions in the AMD K6-2 implementation of 3DNow ! Electronic Notes in Theoretical Computer Science, 1999. ,
(E) Programming languages ? C, International Standard ISOIEC, vol.9899, p.1999, 1999. ,
International Standard ISO/IEC1539-1 :2004. Programming languages ? Fortran ? Part 1 : Base language, 2004. ,
Seminumerical Algorithms, The Art of Computer Programming, 1997. ,
DOI : 10.1145/1088322.1088323
Computer arithmetic algorithms, 1993. ,
Inverse Standard Functions for Real and Complex Point and Interval Arguments with Dynamic Accuracy, Scientific Computation with automatic result verification, pp.185-211, 1988. ,
DOI : 10.1007/978-3-7091-6957-5_16
A correctly rounded implementation of the exponential function on the Intel Itanium architecture, 2003. ,
Basic building blocks for a triple-double intermediate format, 2005. ,
URL : https://hal.archives-ouvertes.fr/inria-00070314
Exact and mid-point rounding cases of power(x,y) Rapport de recherche 2006-46, 2006. ,
Parameterisable floating-point operators on FPGAs, 36th Asilomar Conference on Signals, Systems, and Computers, pp.1064-1068, 2002. ,
DOI : 10.1109/acssc.2002.1196947
A Dual-Path Logarithmic Number System Addition/Subtraction Scheme for FPGA, Field-Programmable Logic and Applications, 2003. ,
DOI : 10.1007/978-3-540-45234-8_78
Optimizing Hardware Function Evaluation, IEEE Transactions on Computers, vol.54, issue.12, pp.1520-1531, 2005. ,
DOI : 10.1109/TC.2005.201
Hierarchical segmentation schemes for function evaluation, Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798), 2003. ,
DOI : 10.1109/FPT.2003.1275736
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.202.5891
A hardware Gaussian noise generator using the Box-Muller method and its error analysis, IEEE Transactions on Computers, vol.55, issue.6, p.55, 2006. ,
DOI : 10.1109/TC.2006.81
Multiplication by an integer constant, 1999. ,
Moyens arithmétiques pour un calcul fiable, 2000. ,
Worst cases for correct rounding of the elementary functions in double precision, Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, 2004. ,
DOI : 10.1109/ARITH.2001.930110
Interleaved memory function interpolators with application to an accurate LNS arithmetic unit, IEEE Transactions on Computers, vol.43, issue.8, pp.974-982, 1994. ,
DOI : 10.1109/12.295859
An architecture for addition and subtraction of long word length numbers in the logarithmic number system, IEEE Transactions on Computers, vol.39, issue.11, 1990. ,
DOI : 10.1109/12.61042
The libm library and floatingpoint arithmetic for HP-UX on Itanium, 2001. ,
Using floating-point arithmetic on FPGAs to accelerate scientific N-Body simulations, Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2002. ,
DOI : 10.1109/FPGA.2002.1106673
IA-64 and Elementary Functions : Speed and Precision. Hewlett-Packard Professional Books, 2000. ,
Accelerating sine and cosine evaluation with compiler assistance, 16th IEEE Symposium on Computer Arithmetic, 2003. Proceedings., pp.137-140, 2003. ,
DOI : 10.1109/ARITH.2003.1207671
Improved table lookup algorithms for postscaled division, Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, pp.101-108, 2001. ,
DOI : 10.1109/ARITH.2001.930109
De l'arithmétique d'intervalles à la certification de programmes, Thése de doctorat, 2006. ,
Interval analysis, 1966. ,
Advanced Compiler Design and Implementation, 1997. ,
Algorithmes de division pour microprocesseurs : illustration à l'aide du " bug " du pentium, Technique et Science Informatiques, vol.14, issue.8, 1995. ,
A Few Results on Table-Based Methods, Reliable Computing, vol.5, issue.3, pp.279-288, 1999. ,
DOI : 10.1007/978-94-017-1247-7_22
On the definition of ulp(x), Laboratoire de l'Informatique du Parallélisme (LIP), 2005. ,
URL : https://hal.archives-ouvertes.fr/inria-00070503
Elementary Functions, Algorithms and Implementation, Birkhäuser, 2006. ,
URL : https://hal.archives-ouvertes.fr/ensl-00000008
Argument reduction for huge arguments : good to the last bit, 1992. ,
Floating point division and square root algorithms and implementation in the AMD-K7/sup TM/ microprocessor, Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No.99CB36336), 1999. ,
DOI : 10.1109/ARITH.1999.762835
Design issues in division and other floating-point operations, IEEE Transactions on Computers, vol.46, issue.2, pp.154-161, 1997. ,
DOI : 10.1109/12.565590
Accurate Sum and Dot Product, SIAM Journal on Scientific Computing, vol.26, issue.6 ,
DOI : 10.1137/030601818
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.2.1547
A study on the design of floatingpoint functions in FPGAs, Field Programmable Logic and Applications, pp.1131-1135, 2003. ,
Should the Elementary Function Library Be Incorporated Into Computer Instruction Sets?, ACM Transactions on Mathematical Software, vol.2, issue.2, pp.132-142, 1976. ,
DOI : 10.1145/355681.355684
Faithful powering computation using table look-up and a fused accumulation tree, Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, pp.40-47, 2001. ,
DOI : 10.1109/ARITH.2001.930102
Fast table-driven algorithms for interval elementary functions, Proceedings 13th IEEE Sympsoium on Computer Arithmetic, pp.168-174, 1997. ,
DOI : 10.1109/ARITH.1997.614892
Motivations for an Arbitrary Precision Interval Arithmetic and the MPFI Library, Workshop on Validated Computing, pp.155-161, 2002. ,
DOI : 10.1007/s11155-005-6891-y
URL : https://hal.archives-ouvertes.fr/inria-00100985
Analyse et implantation d'algorithmes rapides pour l'évaluation polynomiale sur les nombres flottants, 2006. ,
Rigorous and portable standard functions, BIT Numerical Mathematics, vol.41, issue.3, 2001. ,
Approximating elementary functions with symmetric bipartite tables, IEEE Transactions on Computers, vol.48, issue.8, pp.842-847, 1999. ,
DOI : 10.1109/12.795125
Algorithms for VLSI physical design automation, 1993. ,
DOI : 10.1007/978-1-4615-2351-2
Adaptive precision floating-point arithmetic and fast robust geometric predicates, Discrete and Computational Geometry, pp.305-363, 1997. ,
Quantitative analysis of floating point arithmetic on FPGA based custom computing machines, Proceedings IEEE Symposium on FPGAs for Custom Computing Machines, pp.155-162, 1995. ,
DOI : 10.1109/FPGA.1995.477421
The Teramac configurable computer engine, International Workshop on Field Programmable Logic and Applications, pp.44-53, 1995. ,
Searching worst cases of a one-variable function using lattice reduction, IEEE Transactions on Computers, vol.54, issue.3, pp.340-346, 2005. ,
DOI : 10.1109/TC.2005.55
Worst cases and lattice reduction, 16th IEEE Symposium on Computer Arithmetic, 2003. Proceedings., pp.142-147, 2003. ,
DOI : 10.1109/ARITH.2003.1207672
The symmetric table addition method for accurate function approximation, The Journal of VLSI Signal Processing, vol.21, issue.2, pp.167-177, 1999. ,
DOI : 10.1023/A:1008004523235
New algorithms for improved transcendental functions on IA-64, Proceedings 14th IEEE Symposium on Computer Arithmetic (Cat. No.99CB36336), pp.4-11, 1999. ,
DOI : 10.1109/ARITH.1999.762822
CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications, IEEE Journal of Solid-State Circuits, vol.19, issue.4, pp.497-506, 1984. ,
DOI : 10.1109/JSSC.1984.1052173
Logical Effort : Designing for speed on the back of an envelope, Advanced Research in VLSI, pp.1-16, 1991. ,
Logical Effort : Designing Fast CMOS Circuits, p.1558605576, 1999. ,
Table-driven implementation of the exponential function in IEEE floating-point arithmetic, ACM Transactions on Mathematical Software, vol.15, issue.2, pp.144-157, 1989. ,
DOI : 10.1145/63522.214389
Table-driven implementation of the logarithm function in IEEE floating-point arithmetic, ACM Transactions on Mathematical Software, vol.16, issue.4, pp.378-400, 1990. ,
DOI : 10.1145/98267.98294
Table-lookup algorithms for elementary functions and their error analysis, [1991] Proceedings 10th IEEE Symposium on Computer Arithmetic, 1991. ,
DOI : 10.1109/ARITH.1991.145565
Table-driven implementation of the Expm1 function in IEEE floating-point arithmetic, ACM Transactions on Mathematical Software, vol.18, issue.2, pp.211-222, 1992. ,
DOI : 10.1145/146847.146928
Homogeneous Redundancy: a Technique to Ensure Integrity of Molecular Simulation Results Using Public Computing, 19th IEEE International Parallel and Distributed Processing Symposium, 2005. ,
DOI : 10.1109/IPDPS.2005.247
A 20 bit logarithmic number system processor, IEEE Transactions on Computers, vol.37, issue.2, 1988. ,
DOI : 10.1109/12.2148
The libm library and floatingpoint arithmetic in HP-UX for Itanium-based systems, 2004. ,
FPGAs vs. CPUs, Proceeding of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays , FPGA '04, 2004. ,
DOI : 10.1145/968280.968305
On computing power, Programming Languages and System Architectures, pp.69-86, 1994. ,
DOI : 10.1007/3-540-57840-4_25
A scalable FIR filter using 32-bit floating-point complex arithmetic on a configurable computing machine, IEEE Symposium on FPGAs for Custom Computing Machines, 1998. ,
Constant Coefficient Multiplication Using Look-Up Tables, The Journal of VLSI Signal Processing-Systems for Signal, Image, and Video Technology, vol.36, issue.1, pp.7-15, 2004. ,
DOI : 10.1023/B:VLSI.0000008066.95259.b8
Fast evaluation of the elementary functions in double precision, Proceedings of the Twenty-Seventh Hawaii International Conference on System Sciences HICSS-94, pp.349-358, 1994. ,
DOI : 10.1109/HICSS.1994.323158
Fast hardware-based algorithms for elementary function computations using rectangular multipliers, IEEE Transactions on Computers, vol.43, issue.3, pp.278-294, 1994. ,
DOI : 10.1109/12.272429
Fast evaluation of the elementary functions in single precision, IEEE Transactions on Computers, vol.44, issue.3, pp.453-457, 1995. ,
DOI : 10.1109/12.372037
Convergence guarantee and improvements for a fast hardware exponential and logarithm evaluation scheme, 1978 IEEE 4th Symposium onomputer Arithmetic (ARITH), pp.175-182, 1978. ,
DOI : 10.1109/ARITH.1978.6155762
Binary Adder Architectures for Cell-Based VLSI and their Synthesis, Thése de doctorat, Swiss Federal Institute of Technology, 1997. ,
Fast evaluation of elementary mathematical functions with correctly rounded last bit, ACM Transactions on Mathematical Software, vol.17, issue.3, pp.410-423, 1991. ,
DOI : 10.1145/114697.116813
Multipartite table methods, IEEE Transactions on Computers, vol.54, issue.3, pp.319-330, 2005. ,
DOI : 10.1109/TC.2005.54
Table-based polynomials for fast hardware function evaluation Architectures and Processors Cet article introduit les méthodes à base de tables d'ordre supérieur pour l'évaluation de fonction en matériel, 16th Intl Conference on Application-specific Systems, 2005. ,
A tool for unbiased comparison between logarithmic and floating-point arithmetic Journal of VLSI Signal Processing, 2007. À paraître. Cet article présente deux bibliothèques concurrentes pour l'arithmétique virgule flottante et le système logarithmique. Il montre que c'est la meilleure manière de décider quelle arithmétique est le mieux adaptée à une application donnée ,
Parameterized floating-point logarithm and exponential functions for FPGAs. J. Microprocessors and Microsystems À paraître. Cet article présente des algorithme matériels pour l'exponentielle et le logarithme en virgule flottante. Une approche originale à base de table offre une latence très petite pour une surface acceptable jusqu, 2007. ,
DOI : 10.1016/j.micpro.2006.02.008
URL : https://hal.archives-ouvertes.fr/ensl-00542213
Opérateurs trigonométriques en virgule flottante sur FPGA Cet article est une continuation du précédent. Il démontre l'implémentation d'un opérateur trigonométrique dual sinus/cosinus, RenPar'17, SympA'2006, CFSE'5 et JC'2006, pp.96-105, 2006. ,
DOI : 10.3166/tsi.27.673-698
URL : https://hal.inria.fr/inria-00424001/document
Return of the hardware floatingpoint elementary function A paraître. Cet article montre comment une réduction d'argument itérative reciblée pour la structure fine des FPGA permet d'obtenir des fonctions élémentaires flottantes jusqu, 18th Symposium on Computer Arithmetic, 2007. ,
The price of routing in FPGAs, Journal of Universal Computer Science, vol.6, issue.2, pp.227-239, 2000. ,
Fast and correctly rounded logarithms in double-precision, RAIRO - Theoretical Informatics and Applications, vol.41, issue.1, pp.85-102, 2007. ,
DOI : 10.1051/ita:2007003
Towards the post-ultimate libm Cet article mesure le coût intrinsèque de l'arrondi correct, en terme de temps moyen et de temps au pire cas, en particulier dans le cas où l'on s, 17th Symposium on Computer Arithmetic, pp.288-295, 2005. ,
Software carry-save : A case study for instructionlevel parallelism, Seventh International Conference on Parallel Computing Technologies, 2003. ,
Assisted verification of elementary functions using Gappa Cet article présente l'outil Gappa et sa mise en oeuvre pour obtenir une preuve formelle de la borne d'erreur d'un calcul, Proceedings of the 2006 ACM Symposium on Applied Computing Nous attachons en fait le rapport de recherche dont il est issu, qui est plus complet, pp.1318-1322, 2006. ,
Software techniques for perfect elementary functions in floating-point interval arithmetic Cet article discute l'implementation de fonctions élémentaires pour l'arithmétique d'intervalle «parfaites», c'est-à-dire prouvées, Real Numbers and Computers, 2006. ,