G. Anelli, Total dose behavior of submicron and deep submicron CMOS technologies, 3th Workshop on electronics for LHC experiments, p.40, 1997.

G. Anelli, Design and characterization of radiation tolerant integrated circuits in deep submicron CMOS technologies for the LHC experiments, p.42, 2000.

R. C. Baumann, Soft Errors in Commercial Integrated Circuits, International Journal of High Speed Electronics and Systems, vol.14, issue.2, pp.299309-299354, 2004.

M. P. Baze, Attenuation of single event induced pulses in CMOS combinational logic, IEEE Transactions on Nuclear Science, vol.44, issue.6, pp.22172223-56, 1997.
DOI : 10.1109/23.659038

D. R. Blum, M. J. Myjak, and &. J. Delgado-frias, Enhanced Fault- Tolerant Data Latches for Deep Submicron CMOS, Proceedings of the 2005 International Conference on Computer Design (CDES), pp.2834-54, 2005.

H. E. Jr, &. F. Boesch, and . Mclean, Hole transport and trapping in eld oxides, IEEE Transactions on Nuclear Science, vol.32, issue.6, p.36, 1985.

H. E. Jr and . Boesch, Saturation of threshold voltage shift in MOSFETs at high total dose, IEEE Transactions on Nuclear Science, vol.33, issue.6, pp.11911197-11911234, 1986.

S. An, Congurable Logic Block for the Implementation of a Radiation-Tolerant FPGA, IEEE Transactions on Nuclear Science, issue.6, p.137, 2006.

S. Bonacini, K. Kloukinas, and &. A. Marchioro, Development of SEUrobust , radiation-tolerant and industry-compatible programmable logic components, Journal of Instrumentation (JINST), vol.2, p.137, 2007.

D. Braunig, Ionization and Displacement, Notes of the Short Course of the 2nd European Conference on Radiation and its Eects on Components and Systems, number 2 in, p.35, 1993.

S. Buchner, M. Baze, D. Brown, D. Mcmorrow, and &. J. Melinger, Comparison of error rates in combinational and sequential logic, IEEE Transactions on Nuclear Science, vol.44, issue.6, p.22092216, 1997.
DOI : 10.1109/23.659037

T. Calin, M. Nicolaidis, and &. R. Velazco, Upset hardened memory design for submicron CMOS technology, IEEE Transactions on Nuclear Science, vol.43, issue.6, p.28742878, 1996.
DOI : 10.1109/23.556880
URL : https://hal.archives-ouvertes.fr/hal-00008251

G. Cellere and &. A. Paccagnella, A review of ionizing radiation eects in Floating-Gate memories, IEEE Transactions on Device and Materials Reliability, vol.4, issue.3, pp.359370-75, 2004.

]. G. Clark and &. J. Cain, Error-correction coding for digital communications, p.61, 1981.
DOI : 10.1007/978-1-4899-2174-1

C. Cms, The Electromagnetic Calorimeter Project, CMS, pp.97-130, 1997.

A. G. Dingwall and &. R. Stricker, C 2 L: A new high-speed highdensity bulk CMOS technology, IEEE Journal of Solid-State Circuits, vol.12, p.41, 1977.
DOI : 10.1109/jssc.1977.1050912

J. G. Dooley, SEU-immune latch for gate array, standard cell, and other ASIC applications, 1954.

F. Faccio, G. Anelli, M. Campbell, M. Delmastro, P. Jarron et al., Total dose and Single Event Eects (SEE) in a 0.25 µm CMOS technology, 4th Workshop on electronics for LHC experiments, p.39, 1998.

F. Faccio, K. Kloukinas, A. Marchioro, T. Calin, J. Cosculluela et al., Single Event Eects in Static and Dynamic Registers in a 0.25µm CMOS Technology, IEEE Transactions on Nuclear Science, vol.46, issue.6, p.14341439, 0102.

F. Faccio, RADIATION ISSUES IN THE NEW GENERATION OF HIGH ENERGY PHYSICS EXPERIMENTS, International Journal of High Speed Electronics and Systems, vol.14, issue.02, pp.379399-379446, 2004.
DOI : 10.1142/S0129156404002429

F. Faccio and &. G. Cervelli, Radiation-induced edge eects in deep submicron CMOS transistors, IEEE Transactions on Nuclear Science, vol.52, issue.6, pp.24132420-24132460, 2005.

T. Fuja, C. Heegard, and &. R. Goodman, Linear sum codes for random access memories, IEEE Transactions on Computers, vol.37, issue.9, pp.10301042-63, 1988.
DOI : 10.1109/12.2254

G. Gagliardi, Measurement of SEU on the Module Controller Chip of the ATLAS Pixel Detector, 5th International Meeting on Front-End Electronics, p.82, 2003.

J. Gambles, L. Miles, J. Hass, W. Smith, and &. S. Whitaker, An ultra-low-power, radiation-tolerant Reed Solomon encoder for space applications, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003., pp.631634-54, 2003.
DOI : 10.1109/CICC.2003.1249475

A. Giraldo, Evaluation of Deep Submicron Technologies with Radiation Tolerant Layout for Electronics in the LHC Environments, p.41, 1998.

K. Hagiwara, Physical Review D, volume 66 of III, chapter 31-Statistics, p.10001229, 0101.

R. W. Hamming, Error Detecting and Error Correcting Codes, Bell System Technical Journal, vol.29, issue.2, pp.147160-61, 1950.
DOI : 10.1002/j.1538-7305.1950.tb00463.x
URL : http://campus.unibo.it/10913/1/hamming1950.pdf

K. J. Hass, J. W. Gambles, B. Walker, and &. M. Zampaglione, Mitigating Single Event Upsets From Combinational Logic, 7th NASA VLSI Design Symposium, p.56, 1998.

K. J. Hass and &. J. Piepmeier, An Ultra-Low Power, Radiation Tolerant, High Speed Correlator, 11th NASA VLSI Design Symposium, p.61, 2003.

P. Hazucha, S. Karnik, B. A. Walstra, J. W. Bloechel, J. Tschanz et al., Measurement and Analysis of SER-Tolerant Latch in a 90-nm Dual-V T CMOS Process, IEEE Journal of Solid-State Circuits, vol.39, issue.9, pp.15361543-51, 2004.

A. L. Hopkins, A Fault-Tolerant Information Processing Concept for Space Veichles, IEEE Transactions on Computers, vol.20, issue.11, pp.13941403-56, 1971.

M. Y. Hsiao, A Class of Optimal Minimum Odd-weight-column SEC-DED Codes, IBM Journal of Research and Development, vol.14, issue.4, pp.395401-63, 1970.
DOI : 10.1147/rd.144.0395

M. Huhtinen, Method for estimating dose rates from induced radioactivity in complicated hadron accelerator geometry, p.47, 1997.

M. Huhtinen and &. F. Faccio, Computational method to estimate Single Event Upset rates in an accelerator environment. Nuclear Instruments and Methods in Physics Research A, no, pp.155172-155219, 2000.

P. Jarron, G. Anelli, and T. Calin, Deep submicron CMOS technologies for the LHC experiments, Nuclear Physics B - Proceedings Supplements, vol.78, issue.1-3, pp.625634-625667, 1999.
DOI : 10.1016/S0920-5632(99)00615-5
URL : https://hal.archives-ouvertes.fr/hal-00008232

P. Jarron and G. , Anelliet al. Study of the radiation tolerance of IC's for LHC, RD49 status report 2, 1999.

P. Jarron and G. , Anelliet al. Study of the radiation tolerance of IC's for LHC, RD49 status report 3, 2000.

]. S. Kerns and &. D. Shafer, Ionizing Radiation Eects in MOS Devices & Circuits, chapter Transient-Ionization and Single-Event Phenomena, J.Wiley & Sons, vol.5, p.43, 1989.

K. Kloukinas, F. Faccio, A. Marchioro, and &. P. Moreira, Development of a radiation tolerant 2.0 V standard cell library using a commercial deep submicron CMOS technology for the LHC experiments, 4th Workshop on electronics for LHC experiments, p.42, 1998.

. Kchip, A Radiation Tolerant Digital Data Concentrator chip for the CMS Preshower Detector, 9th Workshop on Electronics for LHC Experiments, p.63, 2003.

K. Kloukinas, S. Bonacini, and &. A. Marchioro, Characterization and production testing of a quad 12 bit 40 Ms/sec A/D converter with automatic digital range selection for calorimetry, 11th Workshop on Electronics for LHC and Future Experiments, p.137, 2005.

R. Koga, Single Event Functional Interrupt (SEFI) Sensitivity in EEPROMs, Military and Aerospace Programmable Logic Device (MAPLD) International Conference, p.48, 1998.

N. Kumar and &. D. Zacher, Automated FSM Error Correction for Single Event Upsets, Military and Aerospace Programmable Logic Device (MAPLD) International Conference, p.63, 2004.

]. J. Kuo and &. J. Luo, Low Voltage CMOS VLSI Circuits, p.39, 1999.
DOI : 10.1002/0471221562

T. E. Langley and &. P. Murray, SEE and TID Test Results of 1Gb Flash Memories, IEEE Radiation Eects Data Workshop, pp.5861-75, 2004.

R. W. Larsen and &. S. Reed, Redundancy by Coding Versus Redundancy by Replication for Failure-Tolerant Sequential Circuits, IEEE Transactions on Computers, vol.21, issue.2
DOI : 10.1109/TC.1972.5008917

A. Marchioro, Deep submicron technologies for HEP, 4th Workshop on electronics for LHC experiments, p.42, 1998.

D. G. Mavis and &. H. Eaton, SEU and SET Mitigation Techniques for FPGA Circuit and Conguration Bit Storage Design, Military and Aerospace Programmable Logic Device (MAPLD) International Conference, p.58, 2000.

]. F. Mclean-89, H. E. Mclean, . Jr, &. T. Boesch, and . Oldham, Ionizing Radiation Eects in MOS Devices & Circuits, chapter Electron-Hole generation, transport and trapping in SiO 2, p.36, 1989.

P. J. Mcwhorter, S. L. Miller, and &. W. Miller, Modeling the anneal of radiation-induced trapped holes in a varying thermal environment, IEEE Transactions on Nuclear Science, vol.37, issue.6, pp.16821688-16821725, 1990.
DOI : 10.1109/23.101177

G. C. Messenger and &. S. Ash, Single event phenomena, p.47, 1997.
DOI : 10.1007/978-1-4615-6043-2

J. F. Meyer, Fault Tolerant Sequential Machines, IEEE Transactions on Computers, vol.20, issue.10, pp.11671177-63, 1971.
DOI : 10.1109/T-C.1971.223101

D. N. Nguyen, S. M. Guertin, G. M. Swift, and &. H. Johnston, Radiation Eects on Advanced Flash Memories, IEEE Transactions on Nuclear Science, vol.46, issue.6, pp.17441750-75, 1999.
DOI : 10.1109/23.819148
URL : https://trs.jpl.nasa.gov/bitstream/2014/17661/1/99-1095.pdf

S. Niranjan, &. J. Frenzel, R. A. Reed, M. A. Carts, P. W. Marshall et al., A Comparison of Fault-Tolerant State Machines Architectures for Space-Borne Electronics Single Event Upset Cross Sections at Various Data Rates, IEEE Transactions on Reliability IEEE Transactions on Nuclear Science, vol.45, issue.43 6, pp.109113-28622867, 1996.

. Schoellkopf, High Density SRAM robust to radiation-induced Soft Errors in 90nm CMOS technology, 1st International Conference on Memory Technology and Design, 2005.

L. Rockett, An SEU-hardened CMOS data latch design, IEEE Transactions on Nuclear Science, vol.35, issue.6, pp.16821687-54, 1988.
DOI : 10.1109/23.25522

J. Rose, A. Gamal, and &. A. Sangiovanni-vincetelli, Architecture of field-programmable gate arrays, Proceedings of the IEEE, pp.10131028-71, 1993.
DOI : 10.1109/5.231340

R. L. Shuler, C. Kouba, and &. M. , SEU performance of TAG based flip-flops, IEEE Transactions on Nuclear Science, vol.52, issue.6, pp.25502553-64, 2005.
DOI : 10.1109/TNS.2005.860712

W. Snoeys, G. Anelli, and M. Campbell, Integrated circuits for particle physics experiments, IEEE Journal of Solid-State Circuits, vol.35, issue.12, p.33, 2000.

T. Speers, J. J. Wang, B. Cronquist, J. Mccollum, H. Tseng et al., µm FLASH Memory Based FPGA for Space Applications, Military and Aerospace Programmable Logic Device (MAPLD) International Conference, p.75, 1999.

G. Swift and &. R. Katz, An experimental survey of heavy ion induced dielectric rupture in Actel field programmable gate arrays (FPGAs), Proceedings of the Third European Conference on Radiation and its Effects on Components and Systems, pp.425430-75, 1995.
DOI : 10.1109/RADECS.1995.509814

R. Velazco, T. Calin, M. Nicolaidis, S. C. Moss, S. D. La-lumondiere et al., SEU-hardened storage cell validation using a pulsed laser, IEEE Transactions on Nuclear Science, vol.43, issue.6, p.51, 1996.
DOI : 10.1109/23.556875
URL : https://hal.archives-ouvertes.fr/hal-00008252

]. J. Von-neumann-56 and . Neumann, Probabilistic logics and the synthesis of reliable organisms from unreliable components, Automata Studies , number 34 in Annals of Mathematical Studies, p.4398

]. J. Wang, W. Wong, S. Wolday, B. Cronquist, J. Mccollum et al., Radiation Eects in FPGAs The Netherlands Single Event Upset and Hardening in 0.15 µm Antifuse-Based Field Programmable Gate Array, 9th Workshop on Electronics for LHC Experiments, pp.75-21582166, 2003.

S. Whitaker, J. Canaris, and &. K. Liu, SEU hardened memory cells for a CCSDS Reed-Solomon encoder, IEEE Transactions on Nuclear Science, vol.38, issue.6, p.14711477, 1991.
DOI : 10.1109/23.124134

P. S. Winokur, Ionizing Radiation Eects in MOS Devices & Circuits, chapter Radiation-Induced Interface Traps, p.37, 1989.

X. Inc, Correcting Single-Event Upsets Through Virtex Partial Conguration, p.76, 2000.

X. Inc, Triple Module Redundancy Design Techniques for Virtex FPGAs Application note v1, p.75, 2001.

X. Inc, QPro Virtex-II 1.5V Radiation Hardened QML Platform FPGAs Data sheet v1, p.75, 2004.

S. Bonacini, F. Faccio, K. Kloukinas, and &. A. Marchioro, An SEU-robust Congurable Logic Block for the Implementation of a Radiation-Tolerant FPGA, IEEE Transactions on Nuclear Science, issue.6, 2006.

S. Bonacini, K. Kloukinas, and &. A. Marchioro, Development of SEU-robust, radiationtolerant and industry-compatible programmable logic components, Journal of Instrumentation (JINST), vol.2, 2007.