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]. A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, On-chip pseudorandom testing for linear and non-linear MEMS. Chapter in Springer selection of best papers from VLSI- SoC, p.5
URL : https://hal.archives-ouvertes.fr/hal-00185934

A. Bounceur, S. Mir, E. Simeu, and L. Rolíndez, Estimation of Test Metrics for the Optimisation of Analogue Circuit Testing, Journal of Electronic Testing : Theory and Applications (JETTA)
DOI : 10.1007/s10836-007-5006-6

URL : https://hal.archives-ouvertes.fr/hal-00199205

A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, Pseudorandom BIST for test and characterization of linear and nonlinear MEMS, Microelectronics Journal, vol.40, issue.7
DOI : 10.1016/j.mejo.2008.05.012

URL : https://hal.archives-ouvertes.fr/hal-00367218

L. Rolíndez, S. Mir, A. Bounceur, J. L. Carbonéro, S. Rolíndez et al., A BIST Scheme for SNDR Testing of ???? ADCs Using Sine-Wave Fitting, Journal of Electronic Testing, vol.8, issue.4, pp.4-6, 2006.
DOI : 10.1007/s10836-006-9500-z

]. A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, Characterization and testing of MEMS nonlinearities, Conférences internationales et Workshops avec comité de lecture ? International Design and Test Workshop (IDT'06), 2006.
URL : https://hal.archives-ouvertes.fr/hal-00156040

A. Bounceur, S. Mir, L. Rolíndez, and E. Simeu, CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization, 14th IFIP International Conference on Very Large Scale Integration VLSI-SoC, pp.320-325, 2006.
DOI : 10.1007/978-0-387-74909-9_16

URL : https://hal.archives-ouvertes.fr/hal-00202160

L. Lizarraga, S. Mir, G. Sicard, and A. Bounceur, Study of a BIST Technique for CMOS Active Pixel Sensors, 2006 IFIP International Conference on Very Large Scale Integration, pp.326-331, 2006.
DOI : 10.1109/VLSISOC.2006.313255

URL : https://hal.archives-ouvertes.fr/hal-00522025

J. Tongbong, A. Bounceur, S. Mir, and J. Carbonéro, Evaluation of test measures for low-cost LNA production testing, Ph.D. forum at 14th IFIP International Conference on Very Large Scale Integration VLSI-SoC'06, pp.48-52, 2006.
URL : https://hal.archives-ouvertes.fr/hal-00522018

A. Bounceur, S. Mir, E. Simeu, and L. Rolíndez, Estimation of test metrics for multiple analogue parametric deviations, International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006., pp.234-239, 2006.
DOI : 10.1109/DTIS.2006.1708706

URL : https://hal.archives-ouvertes.fr/hal-00105472

A. Bounceur, S. Mir, E. Simeu, and L. Rolíndez, On the accurate estimation of test metrics for multiple analogue parametric deviations, 12th International Mixed-Signals Testing Workshop IMSTW'06, pp.19-26, 2006.
URL : https://hal.archives-ouvertes.fr/hal-00142367

A. Bounceur, S. Mir, L. Rolíndez, and E. Simeu, CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization, Informal Digest of the 11th IEEE European Test Symposium, pp.217-222, 2006.
DOI : 10.1007/978-0-387-74909-9_16

URL : https://hal.archives-ouvertes.fr/hal-00202160

]. L. Rolíndez, S. Mir, A. Bounceur, and J. Carbonéro, A Signal to Noise Ratio BIST for ?? Analogue-to-Digital Converters, 24th IEEE VLSI Test Symposium, pp.314-319, 2006.

A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, Pseudorandom Functional BIST for Linear and Nonlinear MEMS, Proceedings of the Design Automation & Test in Europe Conference, pp.664-669, 2006.
DOI : 10.1109/DATE.2006.244039

URL : https://hal.archives-ouvertes.fr/hal-00522093

A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, On-chip Pseudorandom Testing for Linear and Nonlinear MEMS, 13th IFIP International Conference on Very Large Scale Integration (VLSI-SoC), pp.435-440, 2005.
DOI : 10.1007/978-0-387-73661-7_16

URL : https://hal.archives-ouvertes.fr/hal-00185934

L. Rolíndez, S. Mir, A. Bounceur, and J. Carbonero, A Digital BIST for a 16-bit audio Sigma Delta Analogue-to-Digital Converter, International Mixed-Signals Testing Workshop IMSTW'05, pp.45-52, 2005.

A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, Nonlinearity Effects on MEMS Onchip Pseudorandom Testing, International Mixed-Signals Testing Workshop IMSTW'05, pp.224-233, 2005.

]. A. Bounceur, S. Mir, and E. Simeu, Optimisation of digitally coded test vectors for mixed-signal components, 19th Conference on Design of Circuits and Integrated Systems (DCIS'04), pp.895-900, 2004.
URL : https://hal.archives-ouvertes.fr/hal-01392581

L. Rolíndez, S. Mir, G. Prenat, and A. Bounceur, A 0.18 µm CMOS Implementation of On-chip Analogue Test Signal Generation from Digital Test Patterns, IEEE Design and Test in Europe Conference, Interactive presentation, pp.704-705, 2004.

?. Conférences-nationales, A. Akkouche, S. Bounceur, and . Mir, Réduction de tests fonctionnels par modélisation statistique des circuits analogiques, 10ème Journées Nationales du Réseau Doctoral de Microélectronique, 2007.

A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, BIST pour les microsystèmes nonlinéaires, 9ème Journées Nationales du Réseau Doctoral de Microélectronique, 2006.

A. Bounceur, A. Dhayni, S. Mir, and L. Rufer, Génération de vecteurs de test pour des MEMS purement nonlinéaires pour le calcul des noyaux de Volterra, 8ème Journées Nationales du Réseau Doctoral de Microélectronique, pp.340-342, 2005.

A. Dhayni, S. Mir, L. Rufer, and A. Bounceur, Autotest Intégré des Microsystèmes Nonlinéaires, 8ème Journées Nationales du Réseau Doctoral de Microélectronique, pp.256-258, 2005.

A. Bounceur, S. Mir, and E. Simeu, Génération et optimisation de vecteurs de test pour des composants analogiques et mixtes, 7ème Journées Nationales du Réseau Doctoral de Microélectronique, pp.198-200, 2004.

A. Bounceur and S. Mir, Application des méthodes et des outils de la Recherche Opérationnelle à la Micro-électronique