Conception des interfaces sécurisées pour contrôle-commandes de puissance

Abstract : Each actuator of a sail-safe system must be controlled by a fail-safe (i.e. a signal which in presence of failures is either correct or safe). Self-checking systems deliver groups of encoded signals and are not adequate for driving these actuators (since each actuator is controlled by a single signal, which must be fail-safe individually). Due to this particular requirement it was not possible to implement fail-safe systems in VLSI. Therefore all existing fail-safe systems are composed of a self-checking or fault tolerant processing system (e.g. using error detection codes, duplication, triplication etc.), and of a fail-safe interface implemented using discrete components. This interface transforms the outputs of the processing system into fail-safe signals. The draw back of these interfaces is that they are very cumbersome and have a high cost. Furthermore using discrete components results in lower MTTF with respect to VLSI implementations, so that the system availability is reduced. It is therefore mandatory to implement fail-safe interfaces in VLSI. The present work describes a fail-safe interface realised in a smart power technology. It transforms the groups of encoded signals into high-level power signals for driving thus actuators. It combines fail-safe concepts, self-checking design and current monitoring to achieve high levels of safety.
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Theses
Micro and nanotechnologies/Microelectronics. Institut National Polytechnique de Grenoble - INPG, 2002. French


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Contributor : Lucie Torella <>
Submitted on : Tuesday, July 17, 2007 - 3:35:16 PM
Last modification on : Tuesday, July 17, 2007 - 4:01:35 PM

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N. Zaidan. Conception des interfaces sécurisées pour contrôle-commandes de puissance. Micro and nanotechnologies/Microelectronics. Institut National Polytechnique de Grenoble - INPG, 2002. French. <tel-00163342>

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