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Boucle analogique numérique verrouillée sur l'amplitude

Abstract : This work deals with the conception of an analog to digital loop locked on the input signal's value. This loop allows the quantification of a signal with a variable number of elementary cycles. Its application to analog to digital conversion constitutes a first step towards the creation of new analog to digital conversion architectures. The loop uses a local quantification scheme to take advantage of real signals inter-sample redundancy. Five quantification algorithms are presented. This allows the average number of conversion cycles per sample to be reduced with respect to the Successive Approximation Register (SAR) converter, for an equivalent electronic complexity. This gain in terms of average number of cycles per sample is converted into real benefits by the mean of three proposed conversion architectures. The first architecture is designed for low power and leads to consumption gains from 47% to 87% with respect to SAR converters. The second architecture is designed for speed and leads to an average number of cycles per sample as small as 1.06, which is comparable to a Flash converter. This speed is obtained thanks to 2 comparators only with respect to 255 comparators in the case of the Flash converter. The third architecture allows the creation of a continuous time bound of the signal value thanks to asynchronous logic. This representation allows the signal reconstruction at a better precision both in time and in dynamic.
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Contributor : Lucie Torella <>
Submitted on : Tuesday, July 17, 2007 - 10:50:23 AM
Last modification on : Friday, December 11, 2020 - 8:28:04 AM
Long-term archiving on: : Thursday, April 8, 2010 - 6:29:37 PM


  • HAL Id : tel-00163275, version 1




L. Alacoque. Boucle analogique numérique verrouillée sur l'amplitude. Micro et nanotechnologies/Microélectronique. INSA de Lyon, 2002. Français. ⟨tel-00163275⟩



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