[. Bibliographie, P. Aceto, A. Bouyer, K. Burgueño, and . Larsen, The Power of Reachability Testing for Timed Automata, Theoretical Computer Science, vol.300, pp.1-3411, 2003.

R. Alur, C. Courcoubetis, and D. Dill, Model-Checking in Dense Real-Time, Information and Computation, vol.104, issue.1, pp.2-34, 1993.
DOI : 10.1006/inco.1993.1024

R. Alur, C. Courcoubetis, and T. Henzinger, Computing Accumulated Delays in Real-Time Systems. Formal Methods in System Design, pp.137-156, 1997.

R. Alur and D. Dill, Automata for modeling real-time systems, Proc. 17th International Colloquium on Automata, Languages and Programming (ICALP'90), pp.322-335, 1990.
DOI : 10.1007/BFb0032042

R. Alur and D. Dill, A theory of timed automata, Theoretical Computer Science, vol.126, issue.2, pp.183-235, 1994.
DOI : 10.1016/0304-3975(94)90010-8

[. Alur, L. Fix, and T. Henzinger, A determinizable class of timed automata, Proc. 6th International Conference on Computer Aided Verification (CAV'94), pp.1-13, 1994.
DOI : 10.1007/3-540-58179-0_39

R. Alur and T. Henzinger, Back to the future: towards a theory of timed regular languages, Proceedings., 33rd Annual Symposium on Foundations of Computer Science, pp.177-186, 1992.
DOI : 10.1109/SFCS.1992.267774

R. Alur, T. Henzinger, and M. Vardi, Parametric real-time reasoning, Proceedings of the twenty-fifth annual ACM symposium on Theory of computing , STOC '93, pp.592-601, 1993.
DOI : 10.1145/167088.167242

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.112.3317

R. Alur, S. L. Torre, and G. Pappas, Optimal Paths in Weighted Timed Automata, Proc. 4th International Workshop on Hybrid Systems : Computation and Control, pp.49-62, 2001.
DOI : 10.1007/3-540-45351-2_8

H. Belmokadem, B. Bérard, P. Bouyer, and F. Laroussinie, A New Modality for Almost Everywhere Propeties in Timed Automata, Proc. 16th International Conference on Concurrency Theory (CONCUR05), volume LNCS 3653, pp.110-124, 2005.

H. Bel-mokadem, B. Bérard, P. Bouyer, and F. Laroussinie, Timed Temporal Logics for Abstracting Transient States, Proceedings of the 4th International Symposium on Automated Technology for Verification and Analysis (ATVA'06), 2006.
DOI : 10.1007/11901914_26

H. Belmokadem, B. Bérard, V. Gourcuff, J. Roussel, and O. Smet, Verification of a Timed Multitask System with Uppaal, Proc. 10th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA'05), pp.347-354, 2005.

P. Bouyer, T. Brihaye, and N. Markey, Improved undecidability results on weighted timed automata, Information Processing Letters, vol.98, issue.5, pp.188-194, 2006.
DOI : 10.1016/j.ipl.2006.01.012

URL : https://hal.archives-ouvertes.fr/hal-01194609

[. Brihaye, V. Bruyère, and J. Raskin, Model-Checking for Weighted Timed Automata, Proc. Joint conference Formal Modelling and Analysis of Timed Systems and Formal Techniques in Real-Time and Fault Tolerant System (FORMATS+FTRTFT'04), volume LNCS 3253, pp.277-292, 2004.
DOI : 10.1007/978-3-540-30206-3_20

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.111.3126

[. Bérard and C. Dufourd, Timed automata and additive clock constraints, Information Processing Letters, vol.75, issue.1-2, pp.1-7, 2000.
DOI : 10.1016/S0020-0190(00)00075-2

[. Bouyer, C. Dufourd, E. Fleury, and A. Petit, Are Timed Automata Updatable?, Proc. 12th International Conference on Computer Aided Verification, pp.464-479, 2000.
DOI : 10.1007/10722167_35

URL : https://hal.archives-ouvertes.fr/hal-00350488

[. Bouyer, C. Dufourd, E. Fleury, and A. Petit, Expressiveness of Updatable Timed Automata, Proc. 25th International Symposium on Mathematical Foundations of Computer Science (MFCS'2000), pp.232-242, 2000.
DOI : 10.1007/3-540-44612-5_19

URL : https://hal.archives-ouvertes.fr/hal-00350490

B. Bérard, V. Diekert, P. Gastin, and A. Petit, Characterization of the Expressive Power of Silent Transitions in Timed Automata, Fundamenta Informaticae, vol.36, issue.23, pp.145-182, 1998.

A. Bfh-+-01-]-gerd-behrmann, T. Fehnker, K. Hune, P. Larsen, J. Pettersson et al., Minimum-Cost Reachability for Priced Timed Automata, Proc. 4th International Workshop on Hybrid Systems : Computation and Control (HSCC'01), volume 2034 of Lecture Notes in Computer Science, pp.147-161, 2001.

B. Bérard, L. Fribourg, F. Klay, and J. Monin, A Compared Study of Two Correctness Proofs for the Standardized Algorithm of ABR Conformance. Formal Methods in System Design, pp.59-86, 2003.

B. Bérard, P. Gastin, and A. Petit, On the power of non-observable actions in timed automata, Proc. 13th Annual Symposium on Theoretical Aspects of Computer Science (STACS'96), pp.257-268, 1996.
DOI : 10.1007/3-540-60922-9_22

G. Canet, Vérification Automatique de programmes écrits dans les langages IL et ST de la norme IEC 61131-3, 2001.

B. Canet, A. Denis, O. Petit, P. Rossi, and . Schnoebelen, Un Cadre pour la Vérification Automatique de Programmes IL, Actes de la 1ère Conférence Internationale Francophone d'Automatique, pp.693-698, 2000.

[. Clarke, A. Emerson, and P. Sistla, Automatic verification of finite-state concurrent systems using temporal logic specifications, ACM Transactions on Programming Languages and Systems, vol.8, issue.2, pp.244-263, 1986.
DOI : 10.1145/5397.5399

A. Zhou-chaochen, C. Ravn, and . Hoare, A calculus of durations, Information Processing Letters, vol.40, issue.5, pp.269-276, 1991.
DOI : 10.1016/0020-0190(91)90122-X

C. Daws, A. Olivero, S. Tripakis, and S. Yovine, The tool Kronos, Proc. Hybrid Systems III : Verification and Control, pp.208-219, 1996.
DOI : 10.1007/BFb0020947

C. Dufourd, Une Extension d'un résultat d'Indécidabilité pour les Automates Temporisés, Proc. 9th Rencontres Francophones du Parallélisme, 1997.

[. Daws and S. Yovine, Reducing the number of clock variables of timed automata, 17th IEEE Real-Time Systems Symposium, pp.73-81, 1996.
DOI : 10.1109/REAL.1996.563702

[. Egger, A. Fett, and P. Pepper, Formal Specification of a Safe PLC Language and its Compiler, SAFECOMP'94, Proc. 13th International Conference on Computer Safety, Reliability and Security (SAFE- COMP'94), pp.11-20, 1994.

A. Emerson and J. Halpern, ???Sometimes??? and ???not never??? revisited: on branching versus linear time temporal logic, Journal of the ACM, vol.33, issue.1, pp.151-178, 1986.
DOI : 10.1145/4904.4999

A. Emerson, Temporal and Modal Logic, volume B (Formal Models and Semantics ) of Handbook of Theoretical Computer Science, pp.995-1072, 1991.

L. Frey, Verification and validation of control algorithms by coupling of interpreted Petri nets, SMC'98 Conference Proceedings. 1998 IEEE International Conference on Systems, Man, and Cybernetics (Cat. No.98CH36218), pp.7-12, 1998.
DOI : 10.1109/ICSMC.1998.725375

G. Frey, Automatic implementation of Petri net based control algorithms on PLC, Proceedings of the 2000 American Control Conference. ACC (IEEE Cat. No.00CH36334), pp.2819-2823, 2000.
DOI : 10.1109/ACC.2000.878725

G. Frey, PLC Programming for Hybrid Systems via Signal Interpreted Petri Nets, Proc. 4th Int Conf on Automation of Mixed Processes ADPM, pp.189-194, 2000.

L. Frey, Formal methods in PLC programming, SMC 2000 Conference Proceedings. 2000 IEEE International Conference on Systems, Man and Cybernetics. 'Cybernetics Evolving to Systems, Humans, Organizations, and their Complex Interactions' (Cat. No.00CH37166), pp.2431-2436, 2000.
DOI : 10.1109/ICSMC.2000.884356

[. Henning, PLC-Automata : A New Class of Implementable Real-Time Automata, Transformation-Based Reactive Systems Development (ARTS'97, pp.111-125, 1997.

T. Henzinger, P. Ho, and H. Wong-toi, A user guide to HyTech, Proc. 1st International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS'95), pp.41-71, 1995.
DOI : 10.1007/3-540-60630-0_3

T. Henzinger, P. Kopke, and H. Wong-toi, The expressive power of clocks, Proc. 22nd International Colloquium on Automata, Languages and Programming (ICALP'95), pp.417-428, 1995.
DOI : 10.1007/3-540-60084-1_93

M. Heiner and T. Menzel, Instruction list verification using a Petri net semantics, SMC'98 Conference Proceedings. 1998 IEEE International Conference on Systems, Man, and Cybernetics (Cat. No.98CH36218), pp.11-14, 1998.
DOI : 10.1109/ICSMC.1998.725498

M. Heiner and T. Menzel, A Petri Net Semantics for the PLC Language Instruction List, Proc. IEE Workshop on Discrete Event Systems (WODES '98), pp.161-165, 1998.

J. Hopcroft and J. Ullman, Introduction to Automata Theory, Languages and Computation, 1979.
DOI : 10.1145/568438.568455

R. Huuck, Software Verification for Programmable Logic Controllers, 2003.

S. Lampérière-couffin, O. Rossi, J. Roussel, and J. Lesage, Formal Validation of PLC Programs : a survey, European Control Conference (ECC'99), 1999.

R. Lewis, Programming Industrial Control Systems using the IEC 1131-3 (Revised edition). The Institution of Electrical Enginneers, 1998.

[. Larsen, P. Pettersson, and W. Yi, Uppaal in a nutshell, International Journal on Software Tools for Technology Transfer, vol.1, issue.1-2, pp.134-152, 1997.
DOI : 10.1007/s100090050010

C. [. Leveson and . Turner, An investigation of the Therac-25 accidents, Computer, vol.26, issue.7, pp.18-41, 1993.
DOI : 10.1109/MC.1993.274940

A. Mader, A Classification of PLC Models and Applications, Proc. 5th Int. Workshop on Discrete Event Systems (WODES), pp.239-247, 2000.
DOI : 10.1007/978-1-4615-4493-7_24

M. Minsky, Computation : Finite and Infinite Machines, 1967.

]. I. Moo94 and . Moon, Modeling Programmable Logic Controllers for Logic Verification, IEEE Control Systems Magazine, 1994.

A. Mader and H. Wupper, Timed automaton models for simple programmable logic controllers, Proceedings of 11th Euromicro Conference on Real-Time Systems. Euromicro RTS'99, pp.114-122, 1999.
DOI : 10.1109/EMRTS.1999.777456

A. Pnueli, The temporal logic of programs, 18th Annual Symposium on Foundations of Computer Science (sfcs 1977), pp.46-57, 1977.
DOI : 10.1109/SFCS.1977.32

J. Queille and J. Sifakis, Specification and verification of concurrent systems in CESAR, Proc. 5th International Symposium on Programming, pp.337-351, 1982.
DOI : 10.1007/3-540-11494-7_22

W. Savitch, Relationships between nondeterministic and deterministic tape complexities, Journal of Computer and System Sciences, vol.4, issue.2, pp.177-192, 1970.
DOI : 10.1016/S0022-0000(70)80006-X

URL : http://doi.org/10.1016/s0022-0000(70)80006-x

[. Tourlas, An Assessment of the IEC 1131-3 Standard on Languages for Programmable Controllers, SAFECOMP97 : the 16th International Conference on Computer Safety, Reliability and Security, pp.210-219, 1997.
DOI : 10.1007/978-1-4471-0997-6_17

]. H. Wil99 and . Willems, Compact Timed Automata for PLC programs, 1999.