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Theses

TOOLS FOR IMPEDANCE EXTRACTION IN INTEGRATED CIRCUITS (IC)

Abstract : With the onset of Gigahertz frequencies on integrated circuits (IC),
inductance effects need to be accurately computed for posterior timing
and noise simulations. In this thesis, we develop a consistent,
accurate and computationally inexpensive approach to self and mutual
impedance extraction of interconnects. Our alternative method is
computationally much less expensive than the PEEC alternative,
significantly more stable, while equally accurate. We solve the
problem of capturing the correct frequency dependence of the
inductance and resistance extraction, one that fully accounts for
proximity effects as function of frequency. Furthermore, we correctly
generalize our treatment to incorporate nonuniform current
distributions as needed to model the skin effect, that starts
manifesting in digital IC's at frequencies near 15~GHz.

We extend our analysis to the study of passive inductor devices, both
for self and mutual impedance computations. An RLC extraction method
is presented in order to capture important information such as
self-resonance frequency and quality number.

We derive an original equation for the delay of an RLC transmission
line under a ramp excitation, with a finite load capacitance.

We present a useful application of inductance in digital IC's. What we
demonstrate in this work is the feasibility to propagate signals at
the maximum speed, that of light in the medium.
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https://tel.archives-ouvertes.fr/tel-00127971
Contributor : Rafael Escovar <>
Submitted on : Tuesday, January 30, 2007 - 12:11:45 PM
Last modification on : Friday, November 6, 2020 - 4:13:00 AM
Long-term archiving on: : Tuesday, April 6, 2010 - 8:50:59 PM

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  • HAL Id : tel-00127971, version 1

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Rafael Escovar. TOOLS FOR IMPEDANCE EXTRACTION IN INTEGRATED CIRCUITS (IC). Modeling and Simulation. Université Joseph-Fourier - Grenoble I, 2006. English. ⟨tel-00127971⟩

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