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Flexible and Scalable Algorithm/Architecture Platform for MP-SoC Design of High Definition Video Compression Algorithms

Abstract : During the last years, the chip's complexity increased exponentially. The possibility to integrate multiple processors into the same chip represents an important gain, at it leads to the concept of Multi-Processors Systems on Chip (MP-SoC). This aspect allowed boosting the computational power offered by the chips. Thus, it became possible to integrate complex applications into a chip, applications that requires a large amount of computations, communications and memory. In this category, we can find the video treatment applications, like the MPEG4. To obtain good implementation results in term of performance, (1) a flexible MPEG4 encoder algorithm was developed, which can be easily adapted for different algorithm parameters, and different parallel/pipeline execution schemes. After this, (2) a flexible modeling was used, in order to represent different algorithm/architecture models containing 2 SMPs. Using these models, (3) a high-level algorithm/architecture exploration method was used, to find the optimal algorithm/architecture configurations required by different applications (i.e. mobile telecom). Using these parameters, (4) an automatic flow was used, to obtain final RTL architectures containing the MPEG4 encoder. Using all these aspects, the MPEG4 encoder was successfully implemented into multiple specific RTL architectures. Additionally, using the same approach, the MPEG4 encoder was implemented on an existing quadric-processors platform, for different video resolutions, frame rates, bitrates, etc.
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Contributor : Lucie Torella <>
Submitted on : Wednesday, July 19, 2006 - 4:07:37 PM
Last modification on : Friday, December 11, 2020 - 8:28:04 AM
Long-term archiving on: : Tuesday, April 6, 2010 - 12:18:22 AM


  • HAL Id : tel-00086779, version 1




M. Bonaciu. Flexible and Scalable Algorithm/Architecture Platform for MP-SoC Design of High Definition Video Compression Algorithms. Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 2006. Français. ⟨tel-00086779⟩



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